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- Question
A test system using the GPIB is being used to monitor a potentially dangerous crash test from a distance of 200 feet. The engineer decides to have you fabricate a special cable, rather than order one, since all the materials are on hand and the tests are already behind schedule. When the tests are run, the test system is erratic and the data is almost useless. What has gone wrong?
Options- A. The engineer is probably not using the correct data format for the specific instruments being used to collect the data.
- B. The GPIB cable is too long; a bus extender should be used.
- C. The cable should be shielded and properly grounded.
- D. The tests themselves probably produced extraneous signals that confused the instruments, resulting in unusable data.
- Correct Answer
- The GPIB cable is too long; a bus extender should be used.
- 1. EEPROM and Flash memory are electrically erasable.
Options- A. True
- B. False Discuss
- 2. The binary adder circuit is designed to add ________ binary number(s) at a time.
Options- A. 1
- B. 3
- C. 2
- D. 5 Discuss
- 3. A logic circuit that can store one bit of information is a ________.
Options- A. flip-flop
- B. counter
- C. gate
- D. code converter Discuss
- 4. All inputs to the MAX7000S device and all macrocell outputs feed the ________.
Options- A. LUT
- B. PIA
- C. LAB
- D. PIA and LAB Discuss
- 5. How many BCD adders would be required to add the numbers 97310 + 3910?
Options- A. 3
- B. 4
- C. 5
- D. 6 Discuss
- 6. Depending on the ________ the IC is in, the output of the stepper motor HDL will respond to each pulse by changing state.
Options- A. mode
- B. make
- C. input
- D. output Discuss
- 7. A positive binary number is represented by a 1 sign bit.
Options- A. True
- B. False Discuss
- 8. In Boolean algebra, A + 1 = 1.
Options- A. True
- B. False Discuss
- 9. The IEEE/ANSI notation of an internal underlined diamond denotes:
Options- A. totem-pole outputs.
- B. open-collector outputs.
- C. quadrature amplifiers.
- D. tristate buffers. Discuss
- 10. In the frequency counter, the control clock is derived from the ________ by frequency dividers controlled in the control and timing block.
Options- A. BCD counters
- B. system clock signal
- C. display register
- D. decoder/display Discuss
More questions
Correct Answer: True
Correct Answer: 2
Correct Answer: flip-flop
Correct Answer: PIA
Correct Answer: 3
Correct Answer: mode
Correct Answer: False
Correct Answer: True
Correct Answer: open-collector outputs.
Correct Answer: system clock signal
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