logo

CuriousTab

CuriousTab

Discussion

Home ‣ Digital Electronics ‣ Memory and Storage See What Others Are Saying!
  • Question

  • Refer the given figure. The outputs (Q0?Q3) of the memory are always LOW. The address lines (A0?A7) are checked with a logic probe and all are indicating pulse activity, except for A3, which shows a constant HIGH, and A7, which shows a constant LOW; the select lines, Refer the given figure. The outputs (Q0?Q3) of the memory are always LOW. The address lines (A0?A7) are checked and Refer the given figure. The outputs (Q0?Q3) of the memory are always LOW. The address lines (A0?A7) shows pulse activity, while Refer the given figure. The outputs (Q0?Q3) of the memory are always LOW. The address lines (A0?A7) indicates a constant HIGH. What is wrong, and how can the memory be tested to determine whether it is defective or if the external circuitry is defective?

    Refer the given figure. The outputs (Q0?Q3) of the memory are always LOW. The address lines (A0?A7)


  • Options
  • A. One of the inputs to the active-LOW select AND gate may be stuck high for some reason; take both select lines LOW and check for pulse activity on the outputs, Q0?Q3. If the outputs now respond, the problem is most likely in the program or circuitry driving the select lines.
  • B. The problem appears to be in the two address lines that never change levels; the problem is probably in the program driving the memory address bus.
  • C. The output buffers are probably defective since they are all tied together; the common input line is most likely stuck LOW. Change the output buffer IC.
  • D. Since no data appears to be getting through to the output buffers, the problem may be in the X decoder; change the X decoder IC.

  • Correct Answer
  • One of the inputs to the active-LOW select AND gate may be stuck high for some reason; take both select lines LOW and check for pulse activity on the outputs, Q0?Q3. If the outputs now respond, the problem is most likely in the program or circuitry driving the select lines. 

    • More questions

    • 1. A positive edge-triggered J-K flip-flop is used to produce a two-phase clock. However, when the circuit is operated it produces erratic results. Close examination with a scope reveals the presence of glitches. What causes the glitches, and how might the problem be corrected?

    • Options
    • A. The PRESET and CLEAR terminals may have been left floating; they should be properly terminated if not being used.
    • B. The problem is caused by a race condition between the J and K inputs; an inverter should be inserted in one of the terminals to correct the problem.
    • C. A race condition exists between the Q and Q outputs to the AND gate; the AND gate should be replaced with a NAND gate.
    • D. A race condition exists between the clock and the outputs of the flip-flop feeding the AND gate; replace the flip-flop with a negative edge-triggered J-K Flip-Flop.
      • Discuss
    • 2. What type of circuit is represented in the given figure, and which statement best describes its operation?


    • Options
    • A. It is a tristate inverter. When the ENABLE input is HIGH, the output is effectively an open circuit?it is neither LOW nor HIGH.
    • B. It is a programmable inverter. It can be programmed to function as either an active LOW or an active HIGH inverter.
    • C. It is an active LOW buffer, which can be turned on and off by the ENABLE input.
    • D. None of the above.
      • Discuss
    • 3. In a text-based language, the circuit being described must be given a name.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. The representation of ?110 in eight-bit two's-complement notation is 11110111.

    • Options
    • A. True
    • B. False
      • Discuss
    • 5. A ring counter is a register in which a certain pattern of 1s and 0s is continuously outputted in parallel.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. Overflow can occur if two signed numbers are added and ________.

    • Options
    • A. they have opposite signs
    • B. they have the same sign
    • C. both of the above
    • D. none of the above
      • Discuss
    • 7. How many bits are used in the data bus?

    • Options
    • A. 7
    • B. 8
    • C. 9
    • D. 16
      • Discuss
    • 8. On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________.

    • Options
    • A. the clock pulse is LOW
    • B. the clock pulse is HIGH
    • C. the clock pulse transitions from LOW to HIGH
    • D. the clock pulse transitions from HIGH to LOW
      • Discuss
    • 9. The inputs/outputs of an analog multiplexer/demultiplexer are:

    • Options
    • A. bidirectional
    • B. unidirectional
    • C. even parity
    • D. binary-coded decimal
      • Discuss
    • 10. The hexadecimal numbering system uses base 15.

    • Options
    • A. True
    • B. False
      • Discuss

    Comments

    There are no comments.
Enter a new Comment




Aptitude

Engineering

Programming

Reasoning

Links

Copyright ©CuriousTab. All rights reserved.