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Home ‣ Digital Electronics ‣ Memory and Storage Comments
  • Question

  • Refer to the given figures (a) and (b). A logic analyzer is used to check the circuit in figure (a) and displays the waveforms shown in figure (b). The actual analyzer display shows all four data outputs, Q0-Q3. The analyzer's cursor is placed at position X and all four of the data output lines show a LOW level output. What is wrong, if anything, with the circuit?

    Refer to the given figures (a) and (b). A logic analyzer is used to check the circuit in figure (a)


  • Options
  • A. Nothing is wrong, according to the display. The outputs are in the open state and should show zero output voltage.
  • B. The circuit is in the READ mode and the outputs, Q0-Q3, should reflect the contents of the memory at that address. The chip is defective; replace the chip.
  • C. The circuit is in the Refer to the given figures (a) and (b). A logic analyzer is used to check the circuit in figure (a) mode and should be writing the contents of the selected address to Q0?Q3.
  • D. The Q0?Q3 lines can be either LOW or HIGH, since the chip is in the tristate mode in which case their level is unpredictable.

  • Correct Answer
  • Nothing is wrong, according to the display. The outputs are in the open state and should show zero output voltage. 

    • Memory and Storage problems

    Search Results

    • 1. The condition occurring when two or more devices try to write data to a bus simultaneously is called ________.

    • Options
    • A. address decoding
    • B. bus contention
    • C. bus collisions
    • D. address multiplexing
      • Discuss
    • 2. Advantage(s) of an EEPROM over an EPROM is/are:

    • Options
    • A. the EPROM can be erased with ultraviolet light in much less time than an EEPROM
    • B. the EEPROM can be erased and reprogrammed without removal from the circuit
    • C. the EEPROM has the ability to erase and reprogram individual words
    • D. the EEPROM can be erased and reprogrammed without removal from the circuit, and can erase and reprogram individual words
      • Discuss
    • 3. Which of the following is not a flash memory mode or operation?

    • Options
    • A. Burst
    • B. Read
    • C. Erase
    • D. Programming
      • Discuss
    • 4. What part of a Flash memory architecture manages all chip functions?

    • Options
    • A. I/O pins
    • B. floating-gate MOSFET
    • C. command code
    • D. program verify code
      • Discuss
    • 5. For the given circuit, what is the bit length of the output data word?


    • Options
    • A. 3
    • B. 4
    • C. 8
    • D. 32
      • Discuss
    • 6. Typically, how often is DRAM refreshed?

    • Options
    • A. 2 to 8 ms
    • B. 4 to 16 ms
    • C. 8 to 16 µs
    • D. 1 to 2 µs
      • Discuss
    • 7. Suppose that a certain semiconductor memory chip has a capacity of 8K × 8. How many bytes could be stored in this device?

    • Options
    • A. 8,000
    • B. 64,000
    • C. 65,536
    • D. 8,192
      • Discuss
    • 8. The reason the data outputs of most ROM ICs are tristate outputs is to:

    • Options
    • A. allow for three separate data input lines.
    • B. allow the bidirectional flow of data between the bus lines and the ROM registers.
    • C. permit the connection of many ROM chips to a common data bus.
    • D. isolate the registers from the data bus during read operations.
      • Discuss
    • 9. CCD stands for ________.

    • Options
    • A. capacitor charging device
    • B. capacitor-capacitor drain
    • C. charged-capacitor device
    • D. charge-coupled device
      • Discuss
    • 10. The mask ROM is ________.

    • Options
    • A. permanently programmed during the manufacturing process
    • B. volatile
    • C. easy to reprogram
    • D. extremely expensive
      • Discuss

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