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Home Digital Electronics Memory and Storage Comments

  • Question
  • Advantage(s) of an EEPROM over an EPROM is/are:


  • Options
  • A. the EPROM can be erased with ultraviolet light in much less time than an EEPROM
  • B. the EEPROM can be erased and reprogrammed without removal from the circuit
  • C. the EEPROM has the ability to erase and reprogram individual words
  • D. the EEPROM can be erased and reprogrammed without removal from the circuit, and can erase and reprogram individual words

  • Correct Answer
  • the EEPROM can be erased and reprogrammed without removal from the circuit, and can erase and reprogram individual words 


  • Memory and Storage problems


    Search Results


    • 1. Which of the following is not a flash memory mode or operation?

    • Options
    • A. Burst
    • B. Read
    • C. Erase
    • D. Programming
    • Discuss
    • 2. What part of a Flash memory architecture manages all chip functions?

    • Options
    • A. I/O pins
    • B. floating-gate MOSFET
    • C. command code
    • D. program verify code
    • Discuss
    • 3. For the given circuit, what is the bit length of the output data word?


    • Options
    • A. 3
    • B. 4
    • C. 8
    • D. 32
    • Discuss
    • 4. To which pin on the RAM chip does the address decoder connect in order to signal which memory chip is being accessed?

    • Options
    • A. The address input
    • B. The output enable
    • C. The chip enable
    • D. The data input
    • Discuss
    • 5. Which of the following best describes static memory devices?

    • Options
    • A. memory devices that are magnetic in nature and do not require constant refreshing
    • B. memory devices that are magnetic in nature and require constant refreshing
    • C. semiconductor memory devices in which stored data will not be retained with the power applied unless constantly refreshed
    • D. semiconductor memory devices in which stored data is retained as long as power is applied
    • Discuss
    • 6. The condition occurring when two or more devices try to write data to a bus simultaneously is called ________.

    • Options
    • A. address decoding
    • B. bus contention
    • C. bus collisions
    • D. address multiplexing
    • Discuss
    • 7. Refer to the given figures (a) and (b). A logic analyzer is used to check the circuit in figure (a) and displays the waveforms shown in figure (b). The actual analyzer display shows all four data outputs, Q0-Q3. The analyzer's cursor is placed at position X and all four of the data output lines show a LOW level output. What is wrong, if anything, with the circuit?


    • Options
    • A. Nothing is wrong, according to the display. The outputs are in the open state and should show zero output voltage.
    • B. The circuit is in the READ mode and the outputs, Q0-Q3, should reflect the contents of the memory at that address. The chip is defective; replace the chip.
    • C. The circuit is in the mode and should be writing the contents of the selected address to Q0?Q3.
    • D. The Q0?Q3 lines can be either LOW or HIGH, since the chip is in the tristate mode in which case their level is unpredictable.
    • Discuss
    • 8. Typically, how often is DRAM refreshed?

    • Options
    • A. 2 to 8 ms
    • B. 4 to 16 ms
    • C. 8 to 16 µs
    • D. 1 to 2 µs
    • Discuss
    • 9. Suppose that a certain semiconductor memory chip has a capacity of 8K × 8. How many bytes could be stored in this device?

    • Options
    • A. 8,000
    • B. 64,000
    • C. 65,536
    • D. 8,192
    • Discuss
    • 10. The reason the data outputs of most ROM ICs are tristate outputs is to:

    • Options
    • A. allow for three separate data input lines.
    • B. allow the bidirectional flow of data between the bus lines and the ROM registers.
    • C. permit the connection of many ROM chips to a common data bus.
    • D. isolate the registers from the data bus during read operations.
    • Discuss


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