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Home Digital Electronics Memory and Storage Comments

  • Question
  • The time from the beginning of a read cycle to the end of tACS or tAA is referred to as:


  • Options
  • A. access time
  • B. data hold
  • C. read cycle time
  • D. write enable time

  • Correct Answer
  • access time 


  • Memory and Storage problems


    Search Results


    • 1. FIFO is formed by an arrangement of ________.

    • Options
    • A. diodes
    • B. transistors
    • C. MOS cells
    • D. shift registers
    • Discuss
    • 2. Address decoding for dynamic memory chip control may also be used for:

    • Options
    • A. controlling refresh circuits
    • B. read and write control
    • C. chip selection and address location
    • D. memory mapping
    • Discuss
    • 3. What is the computer main memory?

    • Options
    • A. Hard drive and RAM
    • B. CD-ROM and hard drive
    • C. RAM and ROM
    • D. CMOS and hard drive
    • Discuss
    • 4. Which is/are the basic refresh mode(s) for dynamic RAM?

    • Options
    • A. Burst refresh
    • B. Distributed refresh
    • C. Open refresh
    • D. Burst refresh and distributed refresh
    • Discuss
    • 5. Which of the following is NOT a type of memory?

    • Options
    • A. RAM
    • B. ROM
    • C. FPROM
    • D. EEPROM
    • Discuss
    • 6. Which of the following best describes static memory devices?

    • Options
    • A. memory devices that are magnetic in nature and do not require constant refreshing
    • B. memory devices that are magnetic in nature and require constant refreshing
    • C. semiconductor memory devices in which stored data will not be retained with the power applied unless constantly refreshed
    • D. semiconductor memory devices in which stored data is retained as long as power is applied
    • Discuss
    • 7. To which pin on the RAM chip does the address decoder connect in order to signal which memory chip is being accessed?

    • Options
    • A. The address input
    • B. The output enable
    • C. The chip enable
    • D. The data input
    • Discuss
    • 8. For the given circuit, what is the bit length of the output data word?


    • Options
    • A. 3
    • B. 4
    • C. 8
    • D. 32
    • Discuss
    • 9. What part of a Flash memory architecture manages all chip functions?

    • Options
    • A. I/O pins
    • B. floating-gate MOSFET
    • C. command code
    • D. program verify code
    • Discuss
    • 10. Which of the following is not a flash memory mode or operation?

    • Options
    • A. Burst
    • B. Read
    • C. Erase
    • D. Programming
    • Discuss


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