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Digital Electronics
‣
Memory and Storage
Comments
Question
When a RAM module passes the checkerboard test it is:
Options
A. able to read and write only 1s.
B. faulty.
C. probably good.
D. able to read and write only 0s.
Correct Answer
probably good.
Memory and Storage problems
Search Results
1. Which type of ROM can be erased by UV light?
Options
A. ROM
B. mask ROM
C. EPROM
D. EEPROM
Show Answer
Scratch Pad
Discuss
Correct Answer: EPROM
2. Which is not characteristic of a shift register?
Options
A. Serial in/parallel in
B. Serial in/parallel out
C. Parallel in/serial out
D. Parallel in/parallel out
Show Answer
Scratch Pad
Discuss
Correct Answer: Serial in/parallel in
3. Computers operate on data internally in a ________ format.
Options
A. tristate
B. universal
C. parallel
D. serial
Show Answer
Scratch Pad
Discuss
Correct Answer: parallel
4. In a 4-bit Johnson counter sequence there are a total of how many states, or bit patterns?
Options
A. 1
B. 2
C. 4
D. 8
Show Answer
Scratch Pad
Discuss
Correct Answer: 8
5. The primary purpose of a three-state buffer is usually:
Options
A. to provide isolation between the input device and the data bus
B. to provide the sink or source current required by any device connected to its output without loading down the output device
C. temporary data storage
D. to control data flow
Show Answer
Scratch Pad
Discuss
Correct Answer: to provide isolation between the input device and the data bus
6. The refresh period for capacitors used in DRAMs is ________.
Options
A. 2 ms
B. 2 µs
C. 64 ms
D. 64 µs
Show Answer
Scratch Pad
Discuss
Correct Answer: 2 ms
7. ROMs retain data when the ________.
Options
A. power is off
B. power is on
C. system is down
D. all of the above
Show Answer
Scratch Pad
Discuss
Correct Answer: all of the above
8. Microprocessors and memory ICs are generally designed to drive only a single TTL load. Therefore, if several inputs are being driven from the same bus, any memory IC must be ________.
Options
A. buffered
B. decoded
C. addressed
D. stored
Show Answer
Scratch Pad
Discuss
Correct Answer: buffered
9. Describe the timing diagram of a write operation.
Options
A. First the data is set on the data bus and the address is set, then the write pulse stores the data.
B. First the address is set, then the data is set on the data bus, and finally the read pulse stores the data.
C. First the write pulse stores the data, then the address is set, and finally the data is set on the data bus.
D. First the data is set on the data bus, then the write pulse stores the data, and finally the address is set.
Show Answer
Scratch Pad
Discuss
Correct Answer: First the data is set on the data bus and the address is set, then the write pulse stores the data.
10. Which of the following RAM timing parameters determine its operating speed?
Options
A.
t
ACC
B.
t
AA
and
t
ACS
C.
t
CO
and
t
OD
D.
t
RC
and
t
WC
Show Answer
Scratch Pad
Discuss
Correct Answer:
t
RC
and
t
WC
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