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  • Question

  • A bidirectional 4-bit shift register is storing the nibble 1101. Its A bidirectional 4-bit shift register is storing the nibble 1101. Its input is HIGH. The nibble 1011 input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing ________.


  • Options
  • A. 1101
  • B. 0111
  • C. 0001
  • D. 1110

  • Correct Answer
  • 0111 

    • Shift Registers problems

    Search Results

    • 1. A modulus-12 ring counter requires a minimum of ________.

    • Options
    • A. 10 flip-flops
    • B. 12 flip-flops
    • C. 6 flip-flops
    • D. 2 flip-flops
      • Discuss
    • 2. What is a recirculating register?

    • Options
    • A. serial out connected to serial in
    • B. all Q outputs connected together
    • C. a register that can be used over again
      • Discuss
    • 3. How much storage capacity does each stage in a shift register represent?

    • Options
    • A. One bit
    • B. Two bits
    • C. Four bits (one nibble)
    • D. Eight bits (one byte)
      • Discuss
    • 4. In a 6-bit Johnson counter sequence there are a total of how many states, or bit patterns?

    • Options
    • A. 2
    • B. 6
    • C. 12
    • D. 24
      • Discuss
    • 5. What is the preset condition for a ring shift counter?

    • Options
    • A. all FFs set to 1
    • B. all FFs cleared to 0
    • C. a single 0, the rest 1
    • D. a single 1, the rest 0
      • Discuss
    • 6. An 8-bit serial in/serial out shift register is used with a clock frequency of 2 MHz to achieve a time delay (td) of ________.

    • Options
    • A. 16 µs
    • B. 8 µs
    • C. 4 µs
    • D. 2 µs
      • Discuss
    • 7. A bidirectional 4-bit shift register is storing the nibble 1110. Its input is LOW. The nibble 0111 is waiting to be entered on the serial data-input line. After two clock pulses, the shift register is storing ________.

    • Options
    • A. 1110
    • B. 0111
    • C. 1000
    • D. 1001
      • Discuss
    • 8. The bit sequence 0010 is serially entered (right-most bit first) into a 4-bit parallel out shift register that is initially clear. What are the Q outputs after two clock pulses?

    • Options
    • A. 0000
    • B. 0010
    • C. 1000
    • D. 1111
      • Discuss
    • 9. If a 10-bit ring counter has an initial state 1101000000, what is the state after the second clock pulse?

    • Options
    • A. 1101000000
    • B. 0011010000
    • C. 1100000000
    • D. 0000000000
      • Discuss
    • 10. What is the difference between a shift-right register and a shift-left register?

    • Options
    • A. There is no difference.
    • B. the direction of the shift
      • Discuss

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