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Home ‣ Digital Electronics ‣ Digital Arithmetic Operations and Circuits See What Others Are Saying!
  • Question

  • What is wrong, if anything, with the circuit in the given figure based on the logic analyzer display accompanying the circuit?

    What is wrong, if anything, with the circuit in the given figure based on the logic analyzer display


  • Options
  • A. The CO terminal is shorted to ground.
  • B. The S1 output is shorted to Vcc.
  • C. The P1 input is not being added into the total.
  • D. Nothing is wrong; the circuit is functioning correctly.

  • Correct Answer
  • The P1 input is not being added into the total. 

    • More questions

    • 1. A sample-and-hold circuit is used in D/A conversion.

    • Options
    • A. True
    • B. False
      • Discuss
    • 2. The ________ is defined as the maximum number of standard logic inputs that an output can drive reliably.

    • Options
    • A. fan-drive
    • B. fan-out
    • C. fan-in
    • D. open-collector
      • Discuss
    • 3. What is the difference between the 7476 and the 74LS76?

    • Options
    • A. the 7476 is master-slave, the 74LS76 is master-slave
    • B. the 7476 is edge-triggered, the 74LS76 is edge-triggered
    • C. the 7476 is edge-triggered, the 74LS76 is master-slave
    • D. the 7476 is master-slave, the 74LS76 is edge-triggered
      • Discuss
    • 4. What is the major downfall of microprocessor/DSP systems?

    • Options
    • A. Speed?they are too fast
    • B. Speed?they are too slow
    • C. Too much flexibility
    • D. Not enough flexibility
      • Discuss
    • 5. An 8-bit serial in/parallel out shift register is clocked at 4 MHz and is used to delay a serial digital signal by 1.25 µs. The output that has the proper delay is ________.

    • Options
    • A. QE
    • B. QF
    • C. QG
    • D. QH
      • Discuss
    • 6. In a negative logic system, the area represented by #3 in the given figure would be the ________ level.


    • Options
    • A. HIGH
    • B. LOW
    • C. off
    • D. uncertain
      • Discuss
    • 7. A 4-bit shift register that receives 4 bits of parallel data will shift to the ________ by ________ position(s) for each clock pulse.

    • Options
    • A. right, one
    • B. right, two
    • C. left, one
    • D. left, three
      • Discuss
    • 8. How many different voltages can be output from a DAC with a 6-bit resolution?

    • Options
    • A. 6
    • B. 16
    • C. 32
    • D. 64
      • Discuss
    • 9. A 4-bit R/2R D/A converter has a reference of 5 V. What is the analog output for the input code 0101?

    • Options
    • A. 3.125 V
    • B. 0.3125 V
    • C. 0.78125 V
    • D. ?3.125 V
      • Discuss
    • 10. A 0.01-µF capacitor is recommended by TTL manufacturers for ________ the power supply.

    • Options
    • A. decoupling
    • B. filtering
    • C. rectifying
    • D. grounding
      • Discuss

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