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Home Electronics Field Effect Transistors (FET) Comments

  • Question
  • When an input signal reduces the channel size, the process is called:


  • Options
  • A. enhancement
  • B. substrate connecting
  • C. gate charge
  • D. depletion

  • Correct Answer
  • depletion 


  • Field Effect Transistors (FET) problems


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    • 1. In the constant-current region, how will the IDS change in an n-channel JFET?

    • Options
    • A. As VGS decreases ID decreases.
    • B. As VGS increases ID increases.
    • C. As VGS decreases ID remains constant.
    • D. As VGS increases ID remains constant.
    • Discuss
    • 2. What is the transconductance of an FET when △ID = 1 mA and △VGS = 1 V?

    • Options
    • A. 1 kS
    • B. 1 mS
    • C. 1 kΩ
    • D. 1 mΩ
    • Discuss
    • 3. Which JFET configuration would connect a high-resistance signal source to a low-resistance load?

    • Options
    • A. source follower
    • B. common-source
    • C. common-drain
    • D. common-gate
    • Discuss
    • 4. When applied input voltage varies the resistance of a channel, the result is called:

    • Options
    • A. saturization
    • B. polarization
    • C. cutoff
    • D. field effect
    • Discuss
    • 5. When VGS = 0 V, a JFET is:

    • Options
    • A. saturated
    • B. an analog device
    • C. an open switch
    • D. cut off
    • Discuss
    • 6. The overall input capacitance of a dual-gate D-MOSFET is lower because the devices are usually connected:

    • Options
    • A. in parallel
    • B. with separate insulation
    • C. with separate inputs
    • D. in series
    • Discuss
    • 7. In an n-channel JFET, what will happen at the pinch-off voltage?

    • Options
    • A. the value of VDS at which further increases in VDS will cause no further increase in ID
    • B. the value of VGS at which further decreases in VGS will cause no further increases in ID
    • C. the value of VDG at which further decreases in VDG will cause no further increases in ID
    • D. the value of VDS at which further increases in VGS will cause no further increases in ID
    • Discuss
    • 8. IDSS can be defined as:

    • Options
    • A. the minimum possible drain current
    • B. the maximum possible current with VGS held at ?4 V
    • C. the maximum possible current with VGS held at 0 V
    • D. the maximum drain current with the source shorted
    • Discuss
    • 9. A "U" shaped, opposite-polarity material built near a JFET-channel center is called the:

    • Options
    • A. gate
    • B. block
    • C. drain
    • D. heat sink
    • Discuss
    • 10. What is the input impedance of a common-gate configured JFET?

    • Options
    • A. very low
    • B. low
    • C. high
    • D. very high
    • Discuss


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