ADC architecture selection — primary advantage What is a key advantage of a parallel-encoded (flash) analog-to-digital converter compared with other ADC types?

Introduction / Context:
ADC selection balances speed, cost, resolution, and complexity. Flash (parallel-encoded) ADCs are chosen in high-speed instrumentation, oscilloscopes, and communication front ends where conversion speed is paramount.

Given Data / Assumptions:

• Flash ADC uses 2^N − 1 comparators operating simultaneously.
• Trade-off: extreme speed at the cost of high component count and power.

Concept / Approach:
Because all thresholds are evaluated at once, conversion occurs in effectively one comparator delay plus encoder delay, making flash the fastest general ADC architecture, far outpacing SAR or integrating types at comparable resolutions.

Step-by-Step Solution:
Identify the dominant benefit: speed.Exclude cost/complexity as benefits; flash is typically more expensive and complex.Therefore select “Very fast conversion”.

Verification / Alternative check:
Vendor datasheets show flash ADCs with sampling in hundreds of MS/s to GS/s ranges, which is not practical with SAR or dual-slope converters at similar resolutions.

Why Other Options Are Wrong:

• Less expensive / less complicated: False; comparator count makes it costly and complex.

Common Pitfalls:

• Equating “fast” with “best” universally; noise, power, and resolution may favor other architectures.

Final Answer:
Very fast conversion