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Flip-Flops
The postponed symbol () on the output of a flip-flop identifies it as being ________.
a D flip-flop
a J-K flip-flop
pulse triggered
trailing edge-triggered
Correct Answer:
pulse triggered
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Flip-Flops
When the output of the NOR gate S-R flip-flop is in the HOLD state (no change), the inputs are ________.
The advantage of a J-K flip-flop over an S-R FF is that ________.
A major drawback to an latch is its ________.
The action of ________ a FF or latch is also called resetting.
The ________ is the time interval immediately following the active transition of the clock signal.
The toggle mode is the mode in which a(n) ________ changes states for each clock pulse.
Assume an latch, made from cross-coupled NAND gates, has a 0 on both inputs. The outputs will be ________.
The term hold always means ________.
The asynchronous inputs on a J-K flip-flop ________.
A flip-flop operation is described as a toggle when the result after a clock is ________.
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