Difficulty: Easy
Correct Answer: Incorrect
Explanation:
Introduction / Context:
Digital logic abstracts voltages into discrete states (e.g., LOW and HIGH). While real circuits have analog behavior beneath, the functional model treats only defined windows as valid logic levels to ensure noise immunity and reliable switching.
Given Data / Assumptions:
Concept / Approach:
Analog signals vary continuously. Digital signals are designed to occupy discrete ranges (e.g., 0–0.8 V for LOW, 2.0–5.0 V for HIGH in TTL, family-dependent). Transitions do pass through intermediate values, but correct operation relies on spending minimal time in those regions.
Step-by-Step Solution:
Verification / Alternative check:
Datasheets specify VOH/VOL and VIH/VIL thresholds; any mid-region is undefined. This confirms discrete-level operation rather than continuous analog variation.
Why Other Options Are Wrong:
Correct: Would conflict with the discrete-level model.
Ambiguous / Only true for open-collector: Implementation details do not change the discrete interpretation of logic levels.
Common Pitfalls:
Assuming “since voltages are analog, digital is continuous.” Digital design purposefully ignores mid-values and treats signals as states with noise margins.
Final Answer:
Incorrect
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