Differential amplifier behavior — equal inputs: If the two inputs of an ideal differential amplifier are exactly equal in magnitude and phase, what is the expected output?

Introduction / Context:A differential amplifier amplifies the difference between its inputs and rejects common-mode signals (those that are the same at both inputs). This question tests recognition of the ideal response and sets the stage for understanding CMRR in practical devices.

Given Data / Assumptions:

• Ideal differential amplifier behavior.
• Both inputs receive exactly the same signal.
• Linear operation (no saturation).

Concept / Approach:The differential gain A_d multiplies (v2 − v1). If v1 = v2, then (v2 − v1) = 0 and the ideal output is zero. Real amplifiers have a finite common-mode gain A_cm, so the output is not perfectly zero, but the ratio CMRR = A_d / A_cm is designed to be very large, making the residual output tiny.

Step-by-Step Solution:

Verification / Alternative check:Instrumentation amplifiers specify CMRR figures (e.g., 100 dB), indicating very strong rejection of equal inputs. Lab tests show a small residual due to finite CMRR, input mismatch, and offset.

Why Other Options Are Wrong:

Common Pitfalls:Assuming any input produces output; forgetting that equal inputs cancel; ignoring that CMRR is finite in practice.

Final Answer:Ideally zero output due to common-mode rejection