Digital storage concept — D latch fundamentals: A D (data) latch is a level-sensitive storage element that propagates the value present on its data input only while its enable/control input is active. In standard form, a D latch has a single data-input line (labeled D), along with an enable (or gate) input and complementary outputs. Evaluate the statement: “A D latch has one data-input line.”

Difficulty: Easy

Correct Answer: Correct

Explanation:


Introduction / Context:
A D (data) latch is a level-sensitive storage element used to hold a single-bit value. It is commonly introduced before edge-triggered flip-flops to explain basic storage behavior, transparency when enabled, and isolation when disabled. This item checks whether you recognize the number and role of its inputs.


Given Data / Assumptions:

  • Standard D latch symbol with one labeled D input.
  • An enable (EN, G, or C) input that controls transparency.
  • Outputs Q and Q̄ are complementary.
  • No preset/clear pins are assumed unless explicitly stated.


Concept / Approach:
The D latch is built so that only a single data path drives the internal cross-coupled gates: the D input. The enable input is not a data input; it is a control line. When EN is active, Q follows D (transparent). When EN is inactive, Q holds its last value. Therefore, “one data-input line” means exactly one signal carries the information to be stored: D.


Step-by-Step Solution:

Identify functional inputs: D (data) and EN (control).Classify EN as control because it gates, but does not itself encode the bit value.Confirm that stored information originates from D alone.Conclude that the statement is correct.


Verification / Alternative check:
Inspect truth behavior: with EN = 1, Q := D; with EN = 0, Q := previous Q. Only D determines the stored bit when sampling occurs; EN merely permits or blocks the transfer.


Why Other Options Are Wrong:

  • Incorrect: A second “data” input does not exist; EN is control, not data.
  • Depends on clock edge polarity: Latches are level-sensitive, not edge-triggered.
  • Undefined for transparent devices: Operation is well-defined under enable control.
  • Only true for master–slave flip-flops: Master–slave is a flip-flop structure, not a simple latch.


Common Pitfalls:
Confusing EN with an additional data channel; mixing up latches (level-sensitive) and flip-flops (edge-triggered); assuming preset/clear exist by default in all symbols.


Final Answer:
Correct

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