Difficulty: Easy
Correct Answer: Correct
Explanation:
Introduction / Context: AOI (AND–OR–Invert) gates are common library elements in standard-cell ASICs and TTL/CMOS logic families. They are formed when a two-level AND–OR structure is followed by a single inversion at the output. This item checks whether you recognize that adding a final inversion to an AND–OR network yields an AOI function.
Given Data / Assumptions:
Concept / Approach: Let the AND–OR network compute S = (P1) + (P2) + ... where each Pi is a product term (e.g., A * B, C * D * E). Adding an inversion gives Y = NOT(S), which by definition is an AOI structure. Using De Morgan’s law, Y = NOT(P1 + P2 + ...) = NOT(P1) * NOT(P2) * ..., demonstrating the dual NAND–NOR interpretation and motivating why AOI (and OAI) forms are efficient in transistor networks.
Step-by-Step Solution:
1) Start with S = (A * B) + (C * D) (example two-term SOP).2) AOI adds a final inverter: Y = NOT(S).3) Apply De Morgan: Y = NOT(A * B + C * D) = NOT(A * B) * NOT(C * D).4) The result is exactly an AND–OR–Invert function, often implemented compactly in CMOS using series–parallel transistor networks.Verification / Alternative check: Standard cell libraries list AOI21, AOI22, etc., where the suffix indicates how many inputs feed the first-level ANDs. Datasheets and timing libraries confirm they are implemented by inverting the output of an AND–OR combination.
Why Other Options Are Wrong: Input inversion is not required to form AOI (that would be OAI variants or different polarities). Limiting to “two-level SOP only” is misleading—AOI refers specifically to two levels plus inversion, which is exactly the structure described. Wired-logic is unrelated to the functional definition.
Common Pitfalls: Confusing AOI with OAI (OR–AND–Invert). Also, forgetting that a single output inverter transforms SOP to POS complements via De Morgan’s law.
Final Answer: Correct
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