Difficulty: Easy
Correct Answer: all of the above
Explanation:
Introduction / Context:
Universal/parallel-access shift registers offer flexible data movement modes, enabling them to interface with both serial and parallel subsystems. Recognizing these modes is key for glue logic design.
Given Data / Assumptions:
Concept / Approach:
Such registers typically allow serial input with serial output (SISO), serial input with parallel output (SIPO), and parallel input with serial output (PISO). Control inputs select between load and shift operations, and outputs can be tapped in serial or parallel form.
Step-by-Step Solution:
Verification / Alternative check:
Datasheet block diagrams show parallel inputs with a load control and serial input path through the flip-flop chain, as well as both serial and parallel outputs.
Why Other Options Are Wrong:
Common Pitfalls:
Final Answer:
all of the above
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