The upper transistor of a totem-pole output is OFF when the gate output is low.

More Questions from Integrated-Circuit Logic Families

• The major advantage of TTL logic circuits over CMOS is lower propagation delay.
• The principal advantage of MOS ICs over TTL ICs is their fast operating speed.
• Due to the extremely low power requirements of CMOS logic circuits, any number of CMOS and TTL gates can be interconnected.
• Most TTL gates use the totem-pole output arrangement.
• The output current capability for a HIGH output condition is called a source current.
• The maximum output voltage recognized as a LOW by a TTL gate is 2.0 V.
• When the outputs of several standard TTL gates are connected together, the gate outputs produce more fan-out.
• ________ is ideally suited for applications using battery power or battery backup power.
• In a DIP the spacing between pins is typically ________.
• A logic probe is placed on the output of a digital circuit and the probe lamp is dimly lit. This display indicates ________.

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