2’s-complement arithmetic: Before adding or subtracting signed binary numbers, operands of different original widths must be sign-extended so that the operation occurs at the same bit width. Evaluate the claim that it is not necessary to have the same number of bits.

Introduction / Context:Signed arithmetic in digital systems is typically implemented with 2's complement representation. Correct results require consistent bit width so that sign bits align and carries/borrows propagate properly.

Given Data / Assumptions:

• Operands may originate with different declared widths (e.g., 5-bit and 8-bit).
• 2's complement addition/subtraction rules apply.
• Overflow detection depends on consistent sign-bit alignment.

Concept / Approach:When widths differ, you must sign-extend the smaller operand to the larger width, duplicating its sign bit into higher positions. Arithmetic is then performed at a single, common width. Saying “not necessary to have the same number of bits” is misleading; operations take place at one width after proper extension.

Step-by-Step Solution:

Verification / Alternative check:HDL synthesis and ISA specifications (e.g., sign-extension on load/extend instructions) formalize this requirement for correctness and overflow semantics.

Why Other Options Are Wrong:

• Correct: Would imply mismatched widths can be directly added without extension.
• Ambiguous / Cannot be determined: The rule is well-defined in 2's complement arithmetic.

Common Pitfalls:Zero-extending negative numbers (wrong) or ignoring width differences, causing sign errors and incorrect overflow flags.

Final Answer:Incorrect