Correct Answer: There are situations, called hazards, that prevent the next insturction in the instruction stream from executing during its designated clock cycle hazards reduce the performance from the ideal speedup gained by pipelining There are three classes of Hazards: 1 Structural hazards: It arise from resource conficts when the hardware cannot support all possible combinations of instructions simultaniously in overlapped execution 2 Data Hazards: It arise when an instruction depends on the results of previous instruction in a way that is exposed by the overlapping of instructions in the pipeline 3control hazards it arise from the pipelining of branches and other instructions that chage the PC
