Series RL circuit — lead/lag identification: In a series RL circuit driven by a sinusoidal source, the current waveform lags the source voltage waveform. Is this statement correct?

Difficulty: Easy

Correct Answer: Correct

Explanation:


Introduction / Context:
Lead/lag relationships are crucial for power factor and control systems. Inductors store energy in magnetic fields and cause current to lag voltage, whereas capacitors cause current to lead. Recognizing the RL case prevents sign errors in phasor analysis.


Given Data / Assumptions:

  • Series RL circuit, linear and time-invariant.
  • Sinusoidal steady-state operation.
  • Finite R and L values.


Concept / Approach:
Impedance is Z = R + jX_L with X_L = 2πfL > 0. The current I = V / Z lags the voltage by angle φ = arctan(X_L / R) > 0 (lag). This positive phase angle means the current's zero crossings occur later in time than the voltage's, a hallmark of inductive circuits.


Step-by-Step Solution:

Express Z and compute φ = arctan(X_L / R).Since X_L > 0, φ > 0 → current lags voltage.Thus, the statement is correct.If L were zero (pure R), φ = 0 and current would be in phase.


Verification / Alternative check:
Oscilloscope with current probe shows current waveform delayed relative to voltage in an RL network; the delay grows with larger X_L / R.


Why Other Options Are Wrong:

“Incorrect” would contradict the physics of inductive reactance.


Common Pitfalls:
Confusing RL with RC, where current leads voltage; mixing up the sign convention for phase angles.


Final Answer:
Correct

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