RL series circuit — phase angle when resistance dominates: In a series R–L AC circuit, if the resistance R is larger than the inductive reactance X_L (i.e., R > X_L), what is the approximate range of the circuit phase angle φ between source voltage and current?

Introduction / Context:
In AC circuit analysis, the phase angle φ between voltage and current in a series R–L network indicates how inductive the circuit is. Recognizing how φ changes as the resistance R and the inductive reactance X_L vary is essential for power factor correction, load characterization, and transformer/motor drive applications. This question asks for the qualitative range of φ when R dominates, i.e., when R > X_L.

Given Data / Assumptions:

• Series R–L circuit driven by a sinusoidal source.
• Resistance R and inductive reactance X_L = 2 * pi * f * L.
• Phase angle φ defined as the angle by which voltage leads current in an R–L series circuit (current lags by φ).
• Linear, time-invariant, steady-state conditions.

Concept / Approach:
The impedance of a series R–L circuit is Z = R + j X_L. The phase angle is φ = arctan(X_L / R). When R > X_L, the ratio X_L / R is less than 1, which directly implies 0° < φ < 45°. As R increases relative to X_L, φ approaches 0°, meaning the circuit becomes more resistive with improved power factor. Conversely, if X_L dominates (X_L > R), φ approaches 90° (strongly inductive).

Step-by-Step Solution:

Verification / Alternative check:
Try numeric examples. If R = 10 Ω and X_L = 5 Ω, φ = arctan(0.5) ≈ 26.6°, which indeed lies between 0° and 45°. If R approaches X_L (e.g., both 10 Ω), φ ≈ 45°. If R ≫ X_L, φ tends to 0°, reflecting a nearly resistive load.

Why Other Options Are Wrong:

• less than 0° (capacitive lead): A negative φ indicates capacitive behavior, which is not possible with only R and L in series.
• exactly 45°: Occurs only when R = X_L, not when R > X_L.
• between 45° and 90°: Requires X_L > R (inductance dominating).

Common Pitfalls:
Confusing magnitude dominance (R vs X_L) with sign of φ; forgetting that inductors cause current to lag (positive φ) while capacitors cause current to lead (negative φ); mixing up series versus parallel cases.

Final Answer:
between 0° and 45°.