Difficulty: Easy
Correct Answer: 25 MHz
Explanation:
Introduction / Context:
Many x86 processors use multipliers to derive an internal core frequency from a lower external bus clock. The 486DX2 family doubled the bus clock to achieve higher internal speeds while retaining compatible motherboard bus timings.
Given Data / Assumptions:
Concept / Approach:
For a DX2, internal core frequency = 2 * external bus frequency. Therefore, knowing the internal clock allows us to compute the FSB by dividing by 2.
Step-by-Step Solution:
Verification / Alternative check:
Historic system specs list common 486DX2 models like 486DX2-50 (25 MHz bus, 50 MHz core) and 486DX2-66 (33 MHz bus, 66 MHz core).
Why Other Options Are Wrong:
10 MHz is not a standard 486 bus for a DX2-50; 50 MHz is the core, not the bus; 100 MHz would imply 4×, which is a later architecture; “None” is wrong because 25 MHz is exact.
Common Pitfalls:
Confusing core clock with bus clock; mixing DX2 vs DX4 multipliers; overlooking that memory and I/O timings correlate with the bus clock, not the multiplied core frequency.
Final Answer:
25 MHz.
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