Parity generator vs. parity checker (4-bit system): Evaluate the statement: “A parity checker is constructed like a parity generator, except a 4-bit system needs five inputs (four data + parity), and the single output is used as an error indicator.”

Introduction / Context:
Parity circuits are standard for low-cost error detection. A parity generator produces a parity bit from data, whereas a parity checker compares received data with the associated parity bit and flags mismatches. For 4-bit data words, a checker must consider all four data inputs plus the received parity input.

Given Data / Assumptions:

• Data width: 4 bits.
• Parity scheme: even or odd (either works similarly for structure).
• Parity generator: 4 inputs → 1 parity output.
• Parity checker: 5 inputs (4 data + 1 parity) → 1 error flag output.

Concept / Approach:
The same XOR building blocks used to generate parity are used to check parity. A checker XORs all five inputs. For even parity, a correct word yields 0; for odd parity, conventions vary (you may invert the result), but the single output still serves as the error indicator. Thus, the structural similarity and the five-input requirement are accurate.

Step-by-Step Solution:

Verification / Alternative check:
Test a valid even parity case: data 1011 has three ones; parity P = 1 to make total 4. XOR(1,0,1,1,1) = 0 → no error. Flip one bit and observe nonzero result → error.

Why Other Options Are Wrong:

Common Pitfalls:
Confusing generator and checker roles; misinterpreting checker output polarity; forgetting that the checker consumes both data and parity.

Final Answer:
Correct