Introduction / Context:
In digital systems, processors, memories, and peripherals exchange information over shared pathways. The term “data bus” describes a common group of conductors used to move data words among components. This question checks foundational literacy in computer organization and I/O architecture.
Given Data / Assumptions:
- “Modern computers” include microcontrollers, microprocessors, and SoCs.
- A bus may be parallel (multiple lines) or serialized (logical bus over few wires).
- We consider on-chip and board-level interconnects conceptually.
Concept / Approach:
A bus is a shared communication medium comprising signals for data, address, and control. The “data bus” specifically carries payload bits between endpoints such as CPU registers, memory, and I/O devices. Even when the physical implementation uses point-to-point serial links, the logical abstraction remains a bus protocol coordinating access and transfer semantics.
Step-by-Step Solution:
Recognize that a bus allows multiple devices to communicate via defined rules (arbitration, timing, signaling).Identify examples: memory buses (DDR), on-chip buses (AHB/AXI), peripheral buses (PCIe, USB, I2C, SPI).Conclude that the shared “data bus” description is accurate at the conceptual level.
Verification / Alternative check:
Block diagrams in datasheets show a CPU core connected to memory and peripherals through a central bus or interconnect fabric.
Why Other Options Are Wrong:
Incorrect: Ignores standard bus-based designs.Applies only to serial links: Buses can be parallel (e.g., internal data buses) or serial (logical buses like I2C/PCIe).True only for microcontrollers, not CPUs: General-purpose CPUs also rely on buses and interconnects to access memory and devices.
Common Pitfalls:
Assuming “bus” must be wide parallel lines; modern buses are often serialized but still shared protocols.Confusing the data bus with address and control buses; they are distinct signal groups.
Final Answer:
Correct
Discussion & Comments