Analog-to-digital converters (N-bit) — match converter type to characteristic List I (Type) A. Flash converter B. Successive-approximation (SAR) C. Counter-ramp (single-slope) D. Dual-slope (integrating) List II (Characteristic) 1. Integrating type 2. Fastest converter 3. Maximum conversion time proportional to 2^N counts 4. Uses a DAC in its feedback path

Difficulty: Easy

Correct Answer: A-2, B-4, C-3, D-1

Explanation:


Introduction / Context:
ADC architectures trade speed, resolution, noise immunity, and circuit complexity. Knowing which topology corresponds to which hallmark characteristic is vital for system design in instrumentation, radios, and embedded systems.


Given Data / Assumptions:

  • Flash ADCs compare the input to many thresholds simultaneously.
  • SAR ADCs perform a binary search using an internal DAC and comparator.
  • Counter-ramp ADCs count up a DAC until it matches the input.
  • Dual-slope ADCs integrate the input and reference in two phases.


Concept / Approach:
We map each converter to its most defining trait: flash is fastest; SAR uses an internal DAC feedback loop; counter-ramp has conversion time proportional to the count span (worst-case ~2^N steps); dual-slope is the classical integrating type known for noise rejection and accuracy rather than speed.


Step-by-Step Solution:

A (Flash) → parallel comparators → fastest → 2.B (SAR) → DAC + successive decisions → uses DAC feedback → 4.C (Counter-ramp) → count until match → max time ~ 2^N counts → 3.D (Dual-slope) → integrate input then reference → integrating type → 1.


Verification / Alternative check:
Datasheets: flash achieves sub-microsecond conversions; SAR takes N clock cycles; counter-ramp speed scales with input magnitude and resolution; dual-slope excels at 50/60 Hz noise rejection.


Why Other Options Are Wrong:

  • Swapping the integrating label to non-integrators or assigning “fastest” to SAR/counter is inconsistent with architecture fundamentals.


Common Pitfalls:
Confusing SAR’s fixed N-cycle conversion with counter-ramp’s input-dependent variable time; assuming any DAC use implies SAR—counter-ramp also uses a DAC, but its defining trait is the counting time.


Final Answer:
A-2, B-4, C-3, D-1

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