JFET operating condition for linear amplification For a properly biased JFET small-signal amplifier intended to operate linearly (without gate current flow), what should be the polarity of the gate-to-source junction under normal operation?

Introduction / Context:
Unlike BJTs, a JFET is a voltage-controlled device with a reverse-biased gate junction (for JFETs with p-n junction gates). This creates a depletion region that modulates the channel cross-section and allows linear small-signal control of drain current by gate-source voltage without significant gate current.

Given Data / Assumptions:

• JFET amplifier intended for linear small-signal operation.
• Standard n-channel or p-channel JFET with a p-n junction between gate and channel.
• Negligible gate current is desired (high input impedance).

Concept / Approach:
A reverse-biased gate-source junction widens the depletion region, controlling channel conduction without injecting carriers across the junction. Small variations in vgs around the bias point vary the channel conductance, producing a proportional change in drain current id = gm * vgs (small-signal), with gm determined by the bias point.

Step-by-Step Solution:

Verification / Alternative check:
Measure gate current with a sensitive meter; in proper reverse bias it will be microamps to nanoamps. Any forward bias will increase gate current dramatically and distort the signal.

Why Other Options Are Wrong:

Common Pitfalls:
Confusing MOSFET insulated-gate behavior with JFET p-n gate junction behavior. A MOSFET gate is insulated; a JFET gate is a diode junction that must be reverse-biased.

Final Answer:
reverse-biased