CPU datapath registers — identifying the Instruction Register (IR): Which description correctly matches the role of the Instruction Register (IR) in a processor datapath?

Introduction / Context:
The Instruction Register (IR) is a key element in the CPU's instruction cycle. It holds the machine instruction currently being decoded and executed. Distinguishing the IR from neighboring registers (PC, MAR, MDR) and functional units (ALU) is essential in computer organization.

Given Data / Assumptions:

• Typical datapath registers include PC (program counter), IR (instruction register), MAR (memory address register), and MDR/MBR (memory data register or buffer).
• The ALU and control unit carry out operations and sequencing, respectively.
• Each option describes a specific hardware component's function.

Concept / Approach:

The IR's role: hold the current instruction's opcode and fields for decode/execute. Compare this to: PC (holds location of next/current instruction), MAR (holds memory addresses for access), MDR/MBR (holds data read from or to be written to memory), and ALU (executes arithmetic/logic). None of the given descriptions states “holds the current instruction,” so “None of the above” is correct.

Step-by-Step Solution:

Verification / Alternative check:

Standard datapath diagrams show IR feeding the control unit's decoder and microcontrol logic, while PC, MAR, and MDR perform address fetch and data buffering, confirming our mapping.

Why Other Options Are Wrong:

• (a) Program Counter (PC), not IR.
• (b) Execution hardware (ALU and control), not IR.
• (c) Memory Address Register (MAR).
• (d) Memory Data/Buffer Register (MDR/MBR).

Common Pitfalls:

Assuming “register that holds instruction location” equals IR; that is the PC's job. IR holds the instruction bits themselves, used for decoding.

Final Answer:

None of the above