Address bus width to addressable memory mapping If a typical PC CPU exposes a 20-bit address bus, how many bytes of memory can it directly address?

Introduction / Context:
Address-bus width determines how many unique memory locations a CPU can directly select. Each distinct address corresponds to one addressable unit (typically a byte in byte-addressable systems). This question reinforces the exponential relationship between address lines and addressable memory size, a cornerstone idea in computer architecture.

Given Data / Assumptions:

• Address bus width: 20 bits.
• Byte-addressable memory (1 address → 1 byte).
• No bank switching or paging tricks; we compute the flat physical address space.

Concept / Approach:

With N address lines, the CPU can form 2^N unique addresses. In a byte-addressable system, that equals 2^N bytes. Convert bytes to megabytes (MB) as needed (1 MB = 2^20 bytes in binary-mebibyte terms commonly used for classic PCs).

Step-by-Step Solution:

Verification / Alternative check:

Historical 8086/8088 PCs used a 20-bit physical address, yielding a 1 MB address space (00000H–FFFFFH), which exactly matches the calculation above.

Why Other Options Are Wrong:

20 MB and 10 MB: would require 24+ bits; they vastly overstate the range for 20 bits.

580 MB: grossly incorrect; would imply far more than 29 bits.

Common Pitfalls:

Confusing data-bus width (bits per transfer) with address-bus width (address count), or mixing decimal MB with binary powers. Always anchor the calculation on 2^N addresses for N address lines.

Final Answer:

1 MB