In an Intel 8085 microprocessor, which of the following option sets lists only the hardware interrupt lines that are triggered by external signals?

Introduction / Context:
This question focuses on identifying the correct set of hardware interrupt lines in the Intel 8085 microprocessor. Hardware interrupts are requested by external devices through dedicated pins on the processor and are a key feature for building responsive real time systems. The 8085 has a small number of such lines, and students are expected to remember their names and roles distinctly from software interrupts and ordinary instructions.

Given Data / Assumptions:

We are dealing with the 8085 microprocessor hardware interrupt structure.

Hardware interrupts are associated with external pins and are triggered by signals from peripheral devices.

The known hardware interrupt inputs are TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR.

Software interrupts like RST 0 to RST 7 are generated by instructions, not external pins.

Control transfer instructions such as CALL or JMP are not interrupts at all.

Concept / Approach:
The Intel 8085 defines five hardware interrupt lines: TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR. Each of these appears as a dedicated input pin on the chip package. When an external device asserts one of these lines and interrupts are enabled, the microprocessor suspends normal execution and services the request by branching to the appropriate service routine. Software interrupts, in contrast, are invoked by RST instructions and do not require an external signal. Other pins like HOLD and READY are control signals, not interrupts. Therefore only the option that lists exactly these five hardware interrupt names is correct.

Step-by-Step Solution:
Step 1: Review the list of hardware interrupts for the 8085: TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR.Step 2: Examine option A and see that it lists all five of these names and no others.Step 3: Check option B and notice that RST 0 to RST 4 are software interrupts issued by instructions, not dedicated pins.Step 4: Recognize that option C contains subroutine and stack instructions such as CALL and PUSH, which are not interrupts.Step 5: Observe that option D mixes an interrupt line INTR with other control pins such as HOLD and READY and serial pins SOD and SID, so it is not a pure list of hardware interrupts. Option E mentions names that belong to other architectures, not the 8085. Therefore select option A.

Verification / Alternative check:
The 8085 pin diagram clearly labels the interrupt related pins as TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR. No other pins are documented as hardware interrupt inputs. RST 0 to RST 7 are instruction mnemonics and do not appear as external pins. Other lines like READY, HOLD, SOD, and SID serve different functions such as bus control or serial data transfer. By comparing the pin diagram with the option sets, it is clear that only option A contains a pure list of hardware interrupt inputs.

Why Other Options Are Wrong:
Option B is a list of software interrupt mnemonics, not external hardware lines. Option C is composed entirely of ordinary instructions that direct program flow and manage the stack, so they do not represent interrupts. Option D mixes one valid interrupt INTR with other types of control and serial pins, so it is not a correct set. Option E uses labels such as NMI and IRQ which are common in other microprocessors but not in the 8085, making it incorrect for this question.

Common Pitfalls:
Students sometimes confuse software interrupt mnemonics with hardware pins and assume that names like RST 0 are also physical pins. Another pitfall is treating any unusual pin as an interrupt, including HOLD or READY, which in fact control bus access and wait states. To answer correctly, always recall the five standard hardware interrupt inputs on the 8085 and avoid mixing them with control, serial, or software mechanisms.

Final Answer:
The hardware interrupts of the Intel 8085 are TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR, as listed in option A.