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Home ‣ Digital Electronics ‣ Integrated-Circuit Logic Families Comments
- Question
A ________ is a testing and troubleshooting tool that generates a short-duration pulse when manually activated, usually by depressing a push button.
Options- A. cattle prod
- B. jimmy rod
- C. logic pulser
- D. bilateral switch
- Correct Answer
- logic pulser
- 1. Propagation delay is important because ________.
Options- A. the logic gates must be given a short break during each clock cycle or else they will overheat
- B. it limits the maximum operating frequency of a gate
- C. it is a measure of how long the clock must be applied to the gate before it will make the required decision
- D. all the gates in a system must have the same propagation times in order to be compatible Discuss
- 2. ________ is about twice as fast as P-MOS.
Options- A. CMOS
- B. DMOS
- C. MOD
- D. N-MOS Discuss
- 3. An open-collector TTL gate ________.
Options- A. can source current but cannot sink current
- B. can sink current but cannot source current
- C. cannot source or sink current
- D. can sink more current than a standard TTL gate Discuss
- 4. P-MOS and N-MOS ________.
Options- A. represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate
- B. are enhancement-type CMOS devices used to produce a series of high-speed logic known as 74HC
- C. represent positive and negative MOS-type devices that can be operated from differential power supplies and are compatible with operational amplifiers
- D. None of the above are. Discuss
- 5. The time it takes for an input signal to pass through internal circuitry and generate the appropriate output effect is known as ________.
Options- A. fan-out
- B. propagation delay
- C. rise time
- D. fall time Discuss
- 6. In the frequency counter, the pulse width of the enable signal is very critical for taking an accurate frequency measurement.
Options- A. True
- B. False Discuss
- 7. A frequency counter is a circuit that can measure and display the frequency of a signal.
Options- A. True
- B. False Discuss
- 8. In the digital clock project HDL, the 1 pps signal is used as a synchronous clock for all of the counters' stages, which are synchronously cascaded.
Options- A. True
- B. False Discuss
- 9. In the digital clock project, the 60 Hz signal is sent through a Schmitt-trigger circuit to produce sine wave pulses at the rate of 60 pps.
Options- A. True
- B. False Discuss
- 10. One CASE construct inside another CASE construct is called a do-loop.
Options- A. True
- B. False Discuss
Integrated-Circuit Logic Families problems
Search Results
Correct Answer: the logic gates must be given a short break during each clock cycle or else they will overheat
Correct Answer: N-MOS
Correct Answer: can sink current but cannot source current
Correct Answer: represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate
Correct Answer: propagation delay
Correct Answer: True
Correct Answer: True
Correct Answer: True
Correct Answer: False
Correct Answer: False
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