logo

CuriousTab

CuriousTab

Discussion


Home Digital Electronics Combinational Logic Circuits Comments

  • Question
  • Except for ________, STD_LOGIC may have the following values.


  • Options
  • A. 'z'
  • B. 'U'
  • C. '?'
  • D. 'L'

  • Correct Answer
  • '?' 


  • Combinational Logic Circuits problems


    Search Results


    • 1. After each circuit in a subsection of a VHDL program has been ________, they can be combined and the subsection can be tested.

    • Options
    • A. designed
    • B. tested
    • C. engineered
    • D. produced
    • Discuss
    • 2. The addition of two signed numbers in the 2's complement system can cause overflow. For overflow to occur both numbers must ________.

    • Options
    • A. be positive
    • B. be negative
    • C. have the same sign
    • D. have opposite signs
    • Discuss
    • 3. The ________ circuit produces a HIGH output whenever the two inputs are equal.

    • Options
    • A. exclusive-AND
    • B. exclusive-NAND
    • C. exclusive-NOR
    • D. exclusive-OR
    • Discuss
    • 4. ________ is a correct combination for an ODD-parity data transmission system.

    • Options
    • A. data = 1101 1011
      parity = 1
    • B. data = 1101 0010
      parity = 0
    • C. data = 0001 0101
      parity = 1
    • D. data = 1010 1111
      parity = 0
    • Discuss
    • 5. VHDL is very strict in the way it allows us to assign and compare ________ such as signals, variables, constants, and literals.

    • Options
    • A. objects
    • B. LOGIC_VECTORS
    • C. designs
    • D. arrays
    • Discuss
    • 6. Parity generation and checking is used to detect ________.

    • Options
    • A. which of two numbers is greater
    • B. errors in binary data transmission
    • C. errors in arithmetic in computers
    • D. when a binary counter counts incorrectly
    • Discuss
    • 7. The Boolean equation for the exclusive-OR function is ________.

    • Options
    • A.
    • B.
    • C.
    • D.
    • Discuss
    • 8. Connecting components together using HDL is not difficult.

    • Options
    • A. True
    • B. False
    • Discuss
    • 9. VHDL was created as a very flexible language and it allows us to define the operation of clocked devices in the code without relying on logic primitives.

    • Options
    • A. True
    • B. False
    • Discuss
    • 10. A gated S-R flip-flop goes into the SET condition when S is HIGH, R is LOW, and EN is HIGH.

    • Options
    • A. True
    • B. False
    • Discuss


    Comments

    There are no comments.

Enter a new Comment