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Home ‣ Digital Electronics ‣ Combinational Logic Circuits Comments
  • Question

  • Single looping in groups of three is a common K-map simplification technique.


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  • A. True
  • B. False

  • Correct Answer
  • False 

    • Combinational Logic Circuits problems

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    • 1. The carry output of each adder in a ripple adder provides an additional sum output bit.

    • Options
    • A. True
    • B. False
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    • 2. To implement the full-adder sum functions, two exclusive-OR gates can be used.

    • Options
    • A. True
    • B. False
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    • 3. A combinatorial logic circuit has memory characteristics that "remember" the inputs after they have been removed.

    • Options
    • A. True
    • B. False
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    • 4. The K-map in the figure below shows the correct implementation of the expression X = ACD + AB(CD + BC).


    • Options
    • A. True
    • B. False
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    • 5.  is in the form of a sum-of-products expression.

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    • A. True
    • B. False
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    • 6. The input at the 1, 2, 4, 8 inputs to a 4-line to 16-line decoder with active-low outputs is 1110. As a result, output line 7 is driven LOW.

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    • A. True
    • B. False
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    • 7. The XOR gate will produce a HIGH output if only one but not both of the inputs is HIGH.

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    • A. True
    • B. False
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    • 8. The Boolean equation results from this Karnaugh map.


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    • A. True
    • B. False
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    • 9. TTL stands for transistor-technology-logic.

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    • A. True
    • B. False
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    • 10. In an even-parity system, the following data will produce a parity bit = 1.
      data = 1010011

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    • A. True
    • B. False
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