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Home ‣ Electronics ‣ Flip-Flops and Timers Comments
  • Question

  • The S-R, D-type, and J-K flip-flops are all examples of _________________.


  • Options
  • A. astable multivibrators
  • B. bistable multivibrators
  • C. monostable multivibrators
  • D. tristable multivibrators

  • Correct Answer
  • bistable multivibrators 

    • Flip-Flops and Timers problems

    Search Results

    • 1. Edge-triggered flip-flops must have _________.

    • Options
    • A. very fast response times
    • B. at least two inputs to handle rising and falling edges
    • C. a positive-transition pulse generator
    • D. a negative-transition pulse generator
      • Discuss
    • 2. The J-K flip-flop eliminates the RACE state when both the J and K inputs are HIGH.

    • Options
    • A. True
    • B. False
      • Discuss
    • 3. J-K flip-flops are often used as switch debouncers.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. When the S and the R inputs are both HIGH the output of an S-R NOR latch will be unpredictable.

    • Options
    • A. True
    • B. False
      • Discuss
    • 5. A D-type flip-flop is constructed by connecting an inverter between the Set and Clock terminals.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. A retriggerable one-shot has a pulse width of 10 ms; 3 ms after being triggered, another trigger pulse is applied. The resulting output pulse will be _________ ms.

    • Options
    • A. 3
    • B. 7
    • C. 10
    • D. 13
      • Discuss
    • 7. An S-R NAND latch with both of its inputs LOW has an output that is _____________.

    • Options
    • A. unpredictable
    • B. floating
    • C. HIGH
    • D. LOW
      • Discuss
    • 8. If an input is activated by a signal transition, it is _____________.

    • Options
    • A. edge-triggered
    • B. toggle-triggered
    • C. clock-triggered
    • D. noise-triggered
      • Discuss
    • 9. The toggle condition in a master-slave J-K flip-flop means that Q and will switch to their ________ state(s) at the _____________________.

    • Options
    • A. inverted, positive clock edge
    • B. quiescent, negative clock edge
    • C. opposite, active clock edge
    • D. reset, synchronous clock edge
      • Discuss
    • 10. An S-R flip-flop can be triggered by ______, ______, or ________.

    • Options
    • A. HIGHs, LOWs, PRESETs
    • B. edges, levels, pulses
    • C. HIGHs, LOWs, CLEARs
    • D. SETs, RESETs, HIGHs
      • Discuss

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