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Home ‣ Electronics ‣ Standard Logic Devices (SLD) Comments
- Question
Schottky TTL logic gates overcome the problem of saturation delay time.
Options- A. True
- B. False
- Correct Answer
- True
- 1. Due to the extremely low power requirements of CMOS logic circuits, any number of CMOS and TTL gates can be interconnected.
Options- A. True
- B. False Discuss
- 2. CMOS circuits consume less power than TTL circuits.
Options- A. True
- B. False Discuss
- 3. 5400 TTL series logic chips are made to military specifications.
Options- A. True
- B. False Discuss
- 4. ECL gates are noted for their high frequency capability and small output voltage swing.
Options- A. True
- B. False Discuss
- 5. The output of a NAND gate is the same as the inverted output of an AND gate.
Options- A. True
- B. False Discuss
- 6. Totem pole output circuits can change states faster than open-collector output circuits.
Options- A. True
- B. False Discuss
- 7. The term buffer/driver signifies the ability to provide low output currents to drive light loads.
Options- A. True
- B. False Discuss
- 8. Delay times and current/voltage values remain constant regardless of temperature or other operating conditions for robust circuits like TTL.
Options- A. True
- B. False Discuss
- 9. NMOS devices use MOSFETs to implement the full range of logic gates using the universal NAND gate.
Options- A. True
- B. False Discuss
- 10. The TTL HIGH level source current is higher than the LOW level sinking current.
Options- A. True
- B. False Discuss
Standard Logic Devices (SLD) problems
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