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- Question
Synchronous construction reduces the delay time of a counter to the delay of __________.
Options- A. all flip-flops and gates
- B. a single flip-flop and a gate
- C. all flip-flops and gates after a 3 count
- D. a single gate
- Correct Answer
- a single flip-flop and a gate
- 1. In order to use a shift register as a counter, ________.
Options- A. the register's serial input is the counter input and the serial output is the counter output
- B. the parallel inputs provide the input signal and the output signal is taken from the serial data output
- C. a serial-in, serial-out register must be used
- D. the serial output of the register is connected back to the serial input of the register Discuss
- 2. To operate correctly, starting a ring counter requires __________.
Options- A. clearing one flip-flop and presetting all the others
- B. clearing all the flip-flops
- C. presetting one flip-flop and clearing all the others
- D. presetting all the flip-flops Discuss
- 3. A _________ shift register can shift stored data either left or right.
Options- A. bidirectional
- B. tri-state
- C. universal
- D. bidirectional universal Discuss
- 4. Asynchronous counters are often called ________ counters.
Options- A. toggle
- B. ripple
- C. binary
- D. flip-flop Discuss
- 5. An asynchronous counter differs from a synchronous counter in the method of clocking.
Options- A. True
- B. False Discuss
- 6. Ring and johnson counters are _______.
Options- A. asynchronous counters
- B. synchronous counters
- C. true binary counters
- D. asynchronous and true binary counters Discuss
- 7. A sequence of equally spaced timing pulses may be easily generated by a(n) __________.
Options- A. ring counter
- B. johnson counter
- C. binary up counter
- D. ripple counter Discuss
- 8. When two counters are cascaded, the overall mod number is equal to the __________ of their individual mod numbers.
Options- A. product
- B. sum
- C. log
- D. reciprocal Discuss
- 9. The mod-10 counter is also referred to as a ________ counter.
Options- A. decade
- B. strobing
- C. ring
- D. BCD Discuss
- 10. A 4-bit PISO shift register that receives 4 bits of parallel data will shift to the ________ by ________ position(s) for each clock pulse.
Options- A. right, one
- B. right, two
- C. left, one
- D. left, three Discuss
Sequential Logic Circuits problems
Search Results
Correct Answer: the serial output of the register is connected back to the serial input of the register
Correct Answer: presetting one flip-flop and clearing all the others
Correct Answer: bidirectional universal
Correct Answer: ripple
Correct Answer: True
Correct Answer: synchronous counters
Correct Answer: ring counter
Correct Answer: product
Correct Answer: decade
Correct Answer: right, one
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