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- Question
Counters are common components in digital clocks.
Options- A. True
- B. False
- Correct Answer
- True
- 1. The serial-in, parallel-out shift register transfers data from one parallel data bus to another parallel data bus one bit at a time across a single line.
Options- A. True
- B. False Discuss
- 2. A multiplexed display circuit uses a technique called time division modulation.
Options- A. True
- B. False Discuss
- 3. An asynchronous decade counter increases its value by ten for each clock pulse.
Options- A. True
- B. False Discuss
- 4. A sixteen-input multiplexer will need three data select input control lines.
Options- A. True
- B. False Discuss
- 5. A hexadecimal decoder selects one of sixteen outputs depending on the 8-bit binary input applied.
Options- A. True
- B. False Discuss
- 6. In an asynchronous counter, each state is clocked by the same pulse.
Options- A. True
- B. False Discuss
- 7. Asynchronous inputs will cause the flip-flop to respond immediately with regard to the clock input.
Options- A. True
- B. False Discuss
- 8. A serial-in, serial-out shift register transfers data from one line of a parallel bus to another line one bit at a time.
Options- A. True
- B. False Discuss
- 9. A parallel-in, serial-out shift register enters all data bits simultaneously and transfers them out one bit at a time.
Options- A. True
- B. False Discuss
- 10. The modulus (mod) of a counter is the same as its maximum count (N).
Options- A. True
- B. False Discuss
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