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  • Question

  • Settling time is normally defined as the time it takes a DAC to settle within ________.


  • Options
  • A. Settling time is normally defined as the time it takes a DAC to settle within ________. 1/8 LSB of i1/8 LSB of its final value when a change occurs in the input code
  • B. Settling time is normally defined as the time it takes a DAC to settle within ________. 1/8 LSB of i1/4 LSB of its final value when a change occurs in the input code
  • C. Settling time is normally defined as the time it takes a DAC to settle within ________. 1/8 LSB of i1/2 LSB of its final value when a change occurs in the input code
  • D. 1 LSB of its final value when a change occurs in the input code

  • Correct Answer
  • 1/2 LSB of its final value when a change occurs in the input code 

    • Digital Signal Processing problems

    Search Results

    • 1. Which of the following best defines Nyquist frequency?

    • Options
    • A. The frequency of resonance for the filtering circuit
    • B. The second harmonic
    • C. The lower frequency limit of sampling
    • D. The highest frequency component of a given analog signal
      • Discuss
    • 2. In a digital reproduction of an analog curve, accuracy can be increased by ________.

    • Options
    • A. sampling the curve more often
    • B. sampling the curve less often
    • C. decreasing the number of bits used to represent each sampled value
    • D. all of the above
      • Discuss
    • 3. An op-amp has very ________.

    • Options
    • A. high voltage gain
    • B. high input impedance
    • C. low output impedance
    • D. all of the above
      • Discuss
    • 4. A binary-weighted-input digital-to-analog converter has a feedback resistor, Rf, of 12 kΩ. If 50 µA of current is through the resistor, voltage out of the circuit is ________.

    • Options
    • A. 0.6 V
    • B. ?0.6 V
    • C. 0.1 V
    • D. ?0.1 V
      • Discuss
    • 5. In the keypad application, just after the 4 ms mark the simulation imitates the release of the key by changing the column value back to F hex, which causes the d output to go into its Hi-Z state. On the next rising clock edge, what happens to dav?

    • Options
    • A. It goes HIGH.
    • B. It goes LOW.
    • C. It goes to Hi-Z.
    • D. It goes to 1111H.
      • Discuss
    • 6. In a flash analog-to-digital converter, the output of each comparator is connected to an input of a ________.

    • Options
    • A. decoder
    • B. priority encoder
    • C. multiplexer
    • D. demultiplexer
      • Discuss
    • 7. The resolution of a 6-bit DAC is ________.

    • Options
    • A. 63%
    • B. 64%
    • C. 15.9%
    • D. 1.59%
      • Discuss
    • 8. If a DAC has a full-scale, or maximum, output of 12 V and accuracy of 0.1%, then the maximum error for any output voltage is ________.

    • Options
    • A. 12 V
    • B. 120 mV
    • C. 12 mV
    • D. 0 V
      • Discuss
    • 9. In a 4-bit R/2R ladder digital-to-analog converter, because of negative feedback, the operational amplifier keeps the inverting (minus) input near ________.

    • Options
    • A. 5 volts
    • B. zero volts
    • C. a voltage determined by the binary weighted input
    • D. none of the above
      • Discuss
    • 10. How are unwanted frequencies removed prior to digital conversion?

    • Options
    • A. Pre-filters
    • B. Digital signal processing
    • C. Sample-and-hold circuits
    • D. All of the above
      • Discuss

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