Discussion
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- Question
________ are used at the inputs of PAL/GAL devices in order to prevent input loading from a large number of AND gates.
Options- A. Simplified AND gates
- B. Fuses
- C. Buffers
- D. Latches
- Correct Answer
- Buffers
- 1. A GAL is essentially a ________.
Options- A. non-reprogrammable PAL
- B. PAL that is programmed only by the manufacturer
- C. very large PAL
- D. reprogrammable PAL Discuss
- 2. Which of the following is true?
Options- A. Altera uses PAL architecture and Xilinx uses PLA architecture.
- B. Altera uses PLA architecture and Xilinx uses PAL architecture.
- C. Altera and Xilinx both use PAL architecture.
- D. Altera and Xilinx both use PLA architecture. Discuss
- 3. The output of this circuit is always ________.
Options- A. 1
- B. 0
- C. A
- D. A Discuss
- 4. A circuit that implements a combinational logic function by storing a list of output values that correspond to all possible input combinations is a(n) ________.
Options- A. output logic macrocell
- B. look-up table
- C. parallel logic expander
- D. logic element Discuss
- 5. Product terms are the outputs of which type of gate within a PLD array?
Options- A. OR
- B. XOR
- C. AND
- D. flip-flop Discuss
- 6. SPLDs, CPLDs, and FPGAs are all which type of device?
Options- A. PAL
- B. PLD
- C. EPROM
- D. SRAM Discuss
- 7. What is PROM?
Options- A. SPLD
- B. QPLD
- C. HPLD
- D. PLD Discuss
- 8. What is the major downfall of microprocessor/DSP systems?
Options- A. Speed?they are too fast
- B. Speed?they are too slow
- C. Too much flexibility
- D. Not enough flexibility Discuss
- 9. What is the input/output pin configuration of the GAL22V10?
Options- A. 10 output pins and 12 input pins
- B. 2 special-purpose pins
- C. 8 pins that are either inputs or outputs
- D. All of the above Discuss
- 10. FPGA is the acronym for ________.
Options- A. Flexible Programming [of] Generic Assemblies
- B. Field Programmable Generic Array
- C. Field Programmable Gate Array
- D. Field Programmer's Gate Assembly Discuss
Programmable Logic Device problems
Search Results
Correct Answer: reprogrammable PAL
Correct Answer: Altera uses PAL architecture and Xilinx uses PLA architecture.
Correct Answer: A
Correct Answer: look-up table
Correct Answer: AND
Correct Answer: PLD
Correct Answer: PLD
Correct Answer: Speed?they are too slow
Correct Answer: 10 output pins and 12 input pins
Correct Answer: Field Programmable Gate Array
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