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Home Digital Electronics MSI Logic Circuits See What Others Are Saying!
  • Question
  • Refer to the figure given below. The logic function generator being implemented with the multiplexer in this circuit produces a constant LOW on the output. The ABC inputs are checked and appear to be pulsing; also, the 0?7 and EN inputs are checked with the scope and all appear to be at 0 V. A check with the DMM confirms that power is on. What is the problem, and what should be done to correct it?

    Refer to the figure given below. The logic function generator being implemented with the multiplexer


  • Options
  • A. The output is shorted to Vcc; replace the IC.
  • B. The scope's vertical input is in the AC mode and the common connection for the 0,2,3 and 5 inputs is bad. Set the scope's vertical input mode to DC, and repair the bad solder connection.
  • C. Power has not been applied to the circuit; apply power.
  • D. The output is shorted to ground; replace the IC.

  • Correct Answer
  • The scope's vertical input is in the AC mode and the common connection for the 0,2,3 and 5 inputs is bad. Set the scope's vertical input mode to DC, and repair the bad solder connection. 


  • More questions

    • 1. With an OR gate, the output is HIGH only when both inputs are HIGH.

    • Options
    • A. True
    • B. False
    • Discuss
    • 2. Which format requires fewer conductors?

    • Options
    • A. Parallel
    • B. Serial
    • C. Both are the same
    • D. Cannot tell
    • Discuss
    • 3. ________ is the output frequency of the counter shown below.


    • Options
    • A. 4 MHz
    • B. 20 kHz
    • C. 210.5 kHz
    • D. 800 Hz
    • Discuss
    • 4. A good example of the use of a digital representation of an analog quantity is the audio recording of music.

    • Options
    • A. True
    • B. False
    • Discuss
    • 5. Which of the following RAM timing parameters determine its operating speed?

    • Options
    • A. tACC
    • B. tAA and tACS
    • C. tCO and tOD
    • D. tRC and tWC
    • Discuss
    • 6. Typically, how often is DRAM refreshed?

    • Options
    • A. 2 to 8 ms
    • B. 4 to 16 ms
    • C. 8 to 16 µs
    • D. 1 to 2 µs
    • Discuss
    • 7. The architecture of a PAL differs slightly from that of a PROM.

    • Options
    • A. True
    • B. False
    • Discuss
    • 8. CCD stands for ________.

    • Options
    • A. capacitor charging device
    • B. capacitor-capacitor drain
    • C. charged-capacitor device
    • D. charge-coupled device
    • Discuss
    • 9. Dynamic memories, such as the 2118 16K × 1 RAM, have to multiplex the address bus.

    • Options
    • A. True
    • B. False
    • Discuss
    • 10. The total amount of external code memory that can be interfaced to the 8051 is:

    • Options
    • A. 32K
    • B. 64K
    • C. 128K
    • D. 256K
    • Discuss


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