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Home ‣ Digital Electronics ‣ MSI Logic Circuits See What Others Are Saying!
  • Question

  • The data transmission system shown in below has a problem; the parity error output is always high. A logic analyzer is used to examine the system and shows that the DATA IN on the left matches the DATA OUT on right. What might be causing the problem?

    The data transmission system shown in below has a problem; the parity error output is always high. A


  • Options
  • A. The error gate could be defective.
  • B. The storage circuit could be defective.
  • C. The parity checker could be bad.
  • D. Any of the above.

  • Correct Answer
  • Any of the above. 

    • More questions

    • 1. When the outputs of several open-collector TTL gates are connected together, the gate outputs ________.

    • Options
    • A. usually burn out
    • B. produce more voltage
    • C. are ANDed together
    • D. produce more fan-out
      • Discuss
    • 2. The expression can be directly implemented using only ________.

    • Options
    • A. an XOR gate
    • B. an XNOR gate
    • C. an AOI circuit
    • D. three 2-input NAND gates
      • Discuss
    • 3. The commutative law of Boolean addition states that A + B = A × B.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. Solve this BCD problem: 0100 + 0110 =

    • Options
    • A. 00010000BCD
    • B. 00010111BCD
    • C. 00001011BCD
    • D. 00010011BCD
      • Discuss
    • 5. The serial format for transmitting binary information uses:

    • Options
    • A. a single conductor
    • B. multiple conductors
    • C. infrared technology
    • D. fiber-optic
      • Discuss
    • 6. Solve this binary problem:

    • Options
    • A. 11001001
    • B. 10010000
    • C. 01101110
    • D. 01110110
      • Discuss
    • 7. Binary subtraction of a decimal 15 from 43 will utilize which two's complement?

    • Options
    • A. 101011
    • B. 110000
    • C. 011100
    • D. 110001
      • Discuss
    • 8. If an analog signal is to be converted to an 8-bit resolution, how many comparators are used in a parallel-encoded ADC?

    • Options
    • A. 127
    • B. 128
    • C. 255
    • D. 256
      • Discuss
    • 9. If an input is activated by a signal transition, it is ________.

    • Options
    • A. edge-triggered
    • B. toggle triggered
    • C. clock triggered
    • D. noise triggered
      • Discuss
    • 10. The octal number for binary 1101110101110110 is ________.

    • Options
    • A. 6545218
    • B. 5565618
    • C. 1566568
    • D. 1565668
      • Discuss

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