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Home Digital Electronics Shift Registers Comments

  • Question
  • Computers operate on data internally in a ________ format.


  • Options
  • A. tristate
  • B. universal
  • C. parallel
  • D. serial

  • Correct Answer
  • parallel 


  • Shift Registers problems


    Search Results


    • 1. In a 4-bit Johnson counter sequence there are a total of how many states, or bit patterns?

    • Options
    • A. 1
    • B. 2
    • C. 4
    • D. 8
    • Discuss
    • 2. The primary purpose of a three-state buffer is usually:

    • Options
    • A. to provide isolation between the input device and the data bus
    • B. to provide the sink or source current required by any device connected to its output without loading down the output device
    • C. temporary data storage
    • D. to control data flow
    • Discuss
    • 3. A 74HC195 4-bit parallel access shift register can be used for ________.

    • Options
    • A. serial in/serial out operation
    • B. serial in/parallel out operation
    • C. parallel in/serial out operation
    • D. all of the above
    • Discuss
    • 4. Another way to connect devices to a shared data bus is to use a ________.

    • Options
    • A. circulating gate
    • B. transceiver
    • C. bidirectional encoder
    • D. strobed latch
    • Discuss
    • 5. When an 8-bit serial in/serial out shift register is used for a 20 µs time delay, the clock frequency is ________.

    • Options
    • A. 40 kHz
    • B. 50 kHz
    • C. 400 kHz
    • D. 500 kHz
    • Discuss
    • 6. Which is not characteristic of a shift register?

    • Options
    • A. Serial in/parallel in
    • B. Serial in/parallel out
    • C. Parallel in/serial out
    • D. Parallel in/parallel out
    • Discuss
    • 7. Which type of ROM can be erased by UV light?

    • Options
    • A. ROM
    • B. mask ROM
    • C. EPROM
    • D. EEPROM
    • Discuss
    • 8. When a RAM module passes the checkerboard test it is:

    • Options
    • A. able to read and write only 1s.
    • B. faulty.
    • C. probably good.
    • D. able to read and write only 0s.
    • Discuss
    • 9. The refresh period for capacitors used in DRAMs is ________.

    • Options
    • A. 2 ms
    • B. 2 µs
    • C. 64 ms
    • D. 64 µs
    • Discuss
    • 10. ROMs retain data when the ________.

    • Options
    • A. power is off
    • B. power is on
    • C. system is down
    • D. all of the above
    • Discuss


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