Discussion
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- Question
In a parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock pulses, the data outputs are ________.
Options- A. 1110
- B. 0001
- C. 1100
- D. 1000
- Correct Answer
- 0001
- 1. What is a transceiver circuit?
Options- A. a buffer that transfers data from input to output
- B. a buffer that transfers data from output to input
- C. a buffer that can operate in both directions Discuss
- 2. If an 8-bit ring counter has an initial state 10111110, what is the state after the fourth clock pulse?
Options- A. 11101011
- B. 00010111
- C. 11110000
- D. 00000000 Discuss
- 3. What does the output enable do on the 74395A chip?
Options- A. It determines when data can be loaded.
- B. It forces all outputs to go HIGH.
- C. It forces all outputs to go LOW.
- D. It activates the three-state buffer. Discuss
- 4. With a 200 kHz clock frequency, eight bits can be serially entered into a shift register in ________.
Options- A. 4 ?s
- B. 40 ?s
- C. 400 ?s
- D. 40 ms Discuss
- 5. What is meant by parallel load of a shift register?
Options- A. All FFs are preset with data.
- B. Each FF is loaded with data, one at a time. Discuss
- 6. An 8-bit serial in/serial out shift register is used with a clock frequency of 150 kHz. What is the time delay between the serial input and the Q3 output?
Options- A. 1.67 µs
- B. 26.67 µs
- C. 26.7 ms
- D. 267 ms Discuss
- 7. A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?
Options- A. ring shift
- B. clock
- C. Johnson
- D. binary Discuss
- 8. When an 8-bit serial in/serial out shift register is used for a 20 µs time delay, the clock frequency is ________.
Options- A. 40 kHz
- B. 50 kHz
- C. 400 kHz
- D. 500 kHz Discuss
- 9. Another way to connect devices to a shared data bus is to use a ________.
Options- A. circulating gate
- B. transceiver
- C. bidirectional encoder
- D. strobed latch Discuss
- 10. A 74HC195 4-bit parallel access shift register can be used for ________.
Options- A. serial in/serial out operation
- B. serial in/parallel out operation
- C. parallel in/serial out operation
- D. all of the above Discuss
Shift Registers problems
Search Results
Correct Answer: a buffer that can operate in both directions
Correct Answer: 11101011
Correct Answer: It activates the three-state buffer.
Correct Answer: 40 ?s
Correct Answer: All FFs are preset with data.
Correct Answer: 26.67 µs
Correct Answer: ring shift
Correct Answer: 400 kHz
Correct Answer: transceiver
Correct Answer: all of the above
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