Discussion
Home ‣ Digital Electronics ‣ Logic Gates Comments
- Question
CMOS IC packages are available in ________.
Options- A. DIP configuration
- B. SOIC configuration
- C. DIP and SOIC configurations
- D. neither DIP nor SOIC configurations
- Correct Answer
- DIP and SOIC configurations
- 1. One advantage TTL has over CMOS is that TTL is ________.
Options- A. less expensive
- B. not sensitive to electrostatic discharge
- C. faster
- D. more widely available Discuss
- 2. The output of an exclusive-NOR gate is HIGH if ________.
Options- A. the inputs are equal
- B. one input is HIGH, and the other input is LOW
- C. the inputs are unequal
- D. none of the above Discuss
- 3. The output of an exclusive-OR gate is HIGH if ________.
Options- A. all inputs are LOW
- B. all inputs are HIGH
- C. the inputs are unequal
- D. none of the above Discuss
- 4. From the truth table for a three-input NOR gate, what is the only condition of inputs A, B, and C that will make the output X high?
Options- A. A = 1, B = 1, C = 1
- B. A = 1, B = 0, C = 0
- C. A = 0, B = 0, C = 1
- D. A = 0, B = 0, C = 0 Discuss
- 5. The NOR logic gate is the same as the operation of the ________ gate with an inverter connected to the output.
Options- A. OR
- B. AND
- C. NAND
- D. none of the above Discuss
- 6. Which of the following choices meets the minimum requirement needed to create specialized waveforms that are used in digital control and sequencing circuits?
Options- A. basic gates, a clock oscillator, and a repetitive waveform generator
- B. basic gates, a clock oscillator, and a Johnson shift counter
- C. basic gates, a clock oscillator, and a DeMorgan pulse generator
- D. basic gates, a clock oscillator, a repetitive waveform generator, and a Johnson shift counter Discuss
- 7. A device used to display one or more digital signals so that they can be compared to expected timing diagrams for the signals is a:
Options- A. DMM
- B. spectrum analyzer
- C. logic analyzer
- D. frequency counter Discuss
- 8. What does the small bubble on the output of the NAND gate logic symbol mean?
Options- A. open collector output
- B. tristate
- C. The output is inverted.
- D. none of the above Discuss
- 9. Which of the following gates is described by the expression
?
Options- A. OR
- B. AND
- C. NOR
- D. NAND Discuss
- 10. The logic gate that will have HIGH or "1" at its output when any one (or more) of its inputs is HIGH is a(n):
Options- A. OR gate
- B. AND gate
- C. NOR gate
- D. NOT operation Discuss
Logic Gates problems
Search Results
Correct Answer: not sensitive to electrostatic discharge
Correct Answer: the inputs are equal
Correct Answer: the inputs are unequal
Correct Answer: A = 0, B = 0, C = 0
Correct Answer: OR
Correct Answer: basic gates, a clock oscillator, and a repetitive waveform generator
Correct Answer: logic analyzer
Correct Answer: The output is inverted.
Correct Answer: NAND
Correct Answer: OR gate
Comments
There are no comments.More in Digital Electronics:
Programming
Copyright ©CuriousTab. All rights reserved.