Discussion
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- Question
The range of a valid LOW input is:
Options- A. 0.0 V to 0.4 V
- B. 0.4 V to 0.8 V
- C. 0.4 V to 1.8 V
- D. 0.4 V to 2.4 V
- Correct Answer
- 0.4 V to 0.8 V
- 1. A digital logic device used as a buffer should have what input/output characteristics?
Options- A. high input impedance and high output impedance
- B. low input impedance and high output impedance
- C. low input impedance and low output impedance
- D. high input impedance and low output impedance Discuss
- 2. What quantities must be compatible when interfacing two different logic families?
Options- A. only the currents
- B. both the voltages and the currents
- C. only the voltages
- D. both the power dissipation and the impedance Discuss
- 3. A TTL totem pole circuit is designed so that the output transistors are:
Options- A. always on together
- B. providing phase splitting
- C. providing voltage regulation
- D. never on together Discuss
- 4. When an IC has two rows of parallel connecting pins, the device is referred to as:
Options- A. a QFP
- B. a DIP
- C. a phase splitter
- D. CMOS Discuss
- 5. The problem of interfacing IC logic families that have different supply voltages (VCCs) can be solved by using a:
Options- A. level-shifter
- B. tri-state shifter
- C. translator
- D. level-shifter or translator Discuss
- 6. The time needed for an output to change as the result of an input change is known as:
Options- A. noise immunity
- B. fanout
- C. propagation delay
- D. rise time Discuss
- 7. The use of triggered sweep when using an oscilloscope provides more accuracy in which area?
Options- A. frequency
- B. amplitude
- C. graticule activity
- D. timing Discuss
- 8. What is the next step after discovering a faulty gate within an IC?
Options- A. repair the gate
- B. resolder the tracks
- C. replace the IC involved
- D. recheck the power source Discuss
- 9. A +5 V PCB power source that has been "pulled down" to a +3.4 V level may be due to:
Options- A. a circuit open
- B. a faulty regulator
- C. the half-split method
- D. a circuit short Discuss
- 10. Measurement of pulse width should be taken at a 50% mean of the:
Options- A. overshoot and undershoot
- B. rise and fall
- C. damping and ringing
- D. leading and trailing amplitude Discuss
Standard Logic Devices (SLD) problems
Search Results
Correct Answer: high input impedance and low output impedance
Correct Answer: both the voltages and the currents
Correct Answer: never on together
Correct Answer: a DIP
Correct Answer: level-shifter or translator
Correct Answer: propagation delay
Correct Answer: timing
Correct Answer: replace the IC involved
Correct Answer: a circuit short
Correct Answer: rise and fall
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