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Home Electronics Standard Logic Devices (SLD) Comments

  • Question
  • Which of the following summarizes the important features of emitter-coupled logic (ECL)?


  • Options
  • A. negative voltage operation, high speed, and high power consumption
  • B. good noise immunity, negative logic, high frequency capability, low power dissipation, and short propagation time
  • C. slow propagation time, high frequency response, low power consumption, and high output voltage swings
  • D. poor noise immunity, positive supply voltage operation, good low-frequency operation, and low power

  • Correct Answer
  • negative voltage operation, high speed, and high power consumption 


  • Standard Logic Devices (SLD) problems


    Search Results


    • 1. Which digital IC package type makes the most efficient use of printed circuit board space?

    • Options
    • A. SMT
    • B. TO can
    • C. flat pack
    • D. DIP
    • Discuss
    • 2. Ten TTL loads per TTL driver is known as:

    • Options
    • A. noise immunity
    • B. power dissipation
    • C. fanout
    • D. propagation delay
    • Discuss
    • 3. Low power consumption achieved by CMOS circuits is due to which construction characteristic?

    • Options
    • A. complementary pairs
    • B. connecting pads
    • C. DIP packages
    • D. small-scale integration
    • Discuss
    • 4. CMOS logic is probably the best all-around circuitry because of its:

    • Options
    • A. packing density
    • B. low power consumption
    • C. very high noise immunity
    • D. low power consumption and very high noise immunity
    • Discuss
    • 5. The output will be a LOW for any case when one or more inputs are zero in a(n):

    • Options
    • A. OR gate
    • B. NOT gate
    • C. AND gate
    • D. NAND gate
    • Discuss
    • 6. What is the standard TTL noise margin?

    • Options
    • A. 5.0 V
    • B. 0.2 V
    • C. 0.8 V
    • D. 0.4 V
    • Discuss
    • 7. The problem of interfacing IC logic families that have different supply voltages (VCCs) can be solved by using a:

    • Options
    • A. level-shifter
    • B. tri-state shifter
    • C. translator
    • D. level-shifter or translator
    • Discuss
    • 8. When an IC has two rows of parallel connecting pins, the device is referred to as:

    • Options
    • A. a QFP
    • B. a DIP
    • C. a phase splitter
    • D. CMOS
    • Discuss
    • 9. A TTL totem pole circuit is designed so that the output transistors are:

    • Options
    • A. always on together
    • B. providing phase splitting
    • C. providing voltage regulation
    • D. never on together
    • Discuss
    • 10. What quantities must be compatible when interfacing two different logic families?

    • Options
    • A. only the currents
    • B. both the voltages and the currents
    • C. only the voltages
    • D. both the power dissipation and the impedance
    • Discuss


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