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- Question
What is the input impedance of a common-gate configured JFET?
Options- A. very low
- B. low
- C. high
- D. very high
- Correct Answer
- very low
- 1. A "U" shaped, opposite-polarity material built near a JFET-channel center is called the:
Options- A. gate
- B. block
- C. drain
- D. heat sink Discuss
- 2. IDSS can be defined as:
Options- A. the minimum possible drain current
- B. the maximum possible current with VGS held at ?4 V
- C. the maximum possible current with VGS held at 0 V
- D. the maximum drain current with the source shorted Discuss
- 3. In an n-channel JFET, what will happen at the pinch-off voltage?
Options- A. the value of VDS at which further increases in VDS will cause no further increase in ID
- B. the value of VGS at which further decreases in VGS will cause no further increases in ID
- C. the value of VDG at which further decreases in VDG will cause no further increases in ID
- D. the value of VDS at which further increases in VGS will cause no further increases in ID Discuss
- 4. The overall input capacitance of a dual-gate D-MOSFET is lower because the devices are usually connected:
Options- A. in parallel
- B. with separate insulation
- C. with separate inputs
- D. in series Discuss
- 5. When an input signal reduces the channel size, the process is called:
Options- A. enhancement
- B. substrate connecting
- C. gate charge
- D. depletion Discuss
- 6. With the E-MOSFET, when gate input voltage is zero, drain current is:
Options- A. at saturation
- B. zero
- C. IDSS
- D. widening the channel Discuss
- 7. Which type of JFET bias requires a negative supply voltage?
Options- A. feedback
- B. source
- C. gate
- D. voltage divider Discuss
- 8. Which component is considered to be an "OFF" device?
Options- A. transistor
- B. JFET
- C. D-MOSFET
- D. E-MOSFET Discuss
- 9. When is a vertical channel E-MOSFET used?
Options- A. for high frequencies
- B. for high voltages
- C. for high currents
- D. for high resistances Discuss
- 10. A very simple bias for a D-MOSFET is called:
Options- A. self biasing
- B. gate biasing
- C. zero biasing
- D. voltage-divider biasing Discuss
Field Effect Transistors (FET) problems
Search Results
Correct Answer: gate
Correct Answer: the maximum possible current with VGS held at 0 V
Correct Answer: the value of VDS at which further increases in VDS will cause no further increase in ID
Correct Answer: in series
Correct Answer: depletion
Correct Answer: zero
Correct Answer: gate
Correct Answer: E-MOSFET
Correct Answer: for high currents
Correct Answer: zero biasing
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