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  • Question
  • What is meant by parallel-loading the register?


  • Options
  • A. Shifting the data in all flip-flops simultaneously
  • B. Loading data in two of the flip-flops
  • C. Loading data in all four flip-flops at the same time
  • D. Momentarily disabling the synchronous SET and RESET inputs

  • Correct Answer
  • Loading data in all four flip-flops at the same time 


  • Sequential Logic Circuits problems


    Search Results


    • 1. Which type of device may be used to interface a parallel data format with external equipment's serial format?

    • Options
    • A. key matrix
    • B. UART
    • C. memory chip
    • D. serial-in, parallel-out
    • Discuss
    • 2. Synchronous counters eliminate the delay problems encountered with asynchronous (ripple) counters because the:

    • Options
    • A. input clock pulses are applied only to the first and last stages
    • B. input clock pulses are applied only to the last stage
    • C. input clock pulses are not used to activate any of the counter stages
    • D. input clock pulses are applied simultaneously to each stage
    • Discuss
    • 3. What is a shift register that will accept a parallel input and can shift data left or right called?

    • Options
    • A. tri-state
    • B. end around
    • C. bidirectional universal
    • D. conversion
    • Discuss
    • 4. A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?

    • Options
    • A. shift register sequencer
    • B. clock
    • C. johnson
    • D. binary
    • Discuss
    • 5. A ripple counter's speed is limited by the propagation delay of:

    • Options
    • A. each flip-flop
    • B. all flip-flops and gates
    • C. the flip-flops only with gates
    • D. only circuit gates
    • Discuss
    • 6. Which of the following memories uses a MOSFET and a capacitor as its memory cell?

    • Options
    • A. SRAM
    • B. DRAM
    • C. ROM
    • D. DROM
    • Discuss
    • 7. The access time (tacc) of a memory IC is governed by the IC's:

    • Options
    • A. internal address buffer
    • B. internal address decoder
    • C. volatility
    • D. internal address decoder and volatility
    • Discuss
    • 8. What is the principal advantage of using address multiplexing with DRAM memory?

    • Options
    • A. reduced memory access time
    • B. reduced requirement for constant refreshing of the memory contents
    • C. reduced pin count and decrease in package size
    • D. no requirement for a chip-select input line, thereby reducing the pin count
    • Discuss
    • 9. Advantage(s) of an EEPROM over an EPROM is (are):

    • Options
    • A. the EPROM can be erased with ultraviolet light in much less time than an EEPROM
    • B. the EEPROM can be erased and reprogrammed without removal from the circuit
    • C. the EEPROM has the ability to erase and reprogram individual words
    • D. the EEPROM can erase and reprogram individual words without removal from the circuit
    • Discuss
    • 10. Which of the following best describes nonvolatile memory?

    • Options
    • A. memory that retains stored information when electrical power is removed
    • B. memory that loses stored information when electrical power is removed
    • C. magnetic memory
    • D. nonmagnetic memory
    • Discuss


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