Propagation delay in TTL is due to slow switching speeds.

More Questions from Logic Families and Their Characteristics

• A pulse is not perfectly square; it takes time for the digital level to rise from 0 up to 1 and to fall from 1 down to 0.
• In TTL the noise margin is between 0.8 V and 0.4 V.
• PMOS and NMOS are commonly used for small memories and microprocessors.
• In ECL, the HIGH and LOW levels are determined by which transistor in a differential amplifier is conducting more.
• The basic part numbers of ICs are the same regardless of the manufacturer because digital logic ICs have been standardized.
• Schottky logic overcomes the saturation and stored charge problem by placing a Schottky diode across the base-to-collector junction.
• A typical fan-out for most TTL is 9.

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