In a simple (early-generation) programmable logic device, what does the internal array primarily consist of for implementing user-defined sum-of-products logic?

Introduction / Context:
Early PLDs implemented logic by allowing users to selectively connect or disconnect product terms in an array. Understanding what physically stores the configuration bits illuminates how these devices realize arbitrary sum-of-products expressions.

Given Data / Assumptions:

• Reference is to simple PLDs (e.g., PALs/PLAs) rather than CPLDs/FPGAs.
• Technology eras included fuse, antifuse, or UV-erasable links.
• Goal is sum-of-products implementation.

Concept / Approach:
Simple PLDs rely on arrays of programmable connections—commonly realized as fusible links or antifuses. By blowing (or forming) links, designers enable specific product terms in the AND plane and combine them in the OR plane. This approach predates the fine-grained LUT logic found in modern FPGAs.

Step-by-Step Solution:
1) Identify the function: implement sum-of-products logic.2) Recognize the storage of configuration: fuse-link array determines which terms are connected.3) Conclude that simple PLDs chiefly contain programmable fuse-link arrays.4) Therefore, option (a) is correct.

Verification / Alternative check:
Classic PAL/PLA datasheets describe programming by opening/closing fusible connections to create product terms and sums.

Why Other Options Are Wrong:
Thousands of gates or advanced sequential logic: that scale and richness are more typical of CPLDs/FPGAs.

Embedded cores: appear in SoC FPGAs, not simple PLDs.

Common Pitfalls:
Assuming all PLDs are gate-rich like FPGAs. Early devices focused on configurable connections rather than large quantities of discrete gates.

Final Answer:
fuse-link arrays