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  • Question
  • What is the decimal value of 2?1 ?


  • Options
  • A. 0.5
  • B. 0.25
  • C. 0.05
  • D. 0.1

  • Correct Answer
  • 0.5 


  • More questions

    • 1. The solution to the binary problem 00110110 ? 00011111 is 00011000.

    • Options
    • A. True
    • B. False
    • Discuss
    • 2. As a technician you are confronted with a TTL circuit board containing dozens of IC chips. You have taken several readings at numerous IC chips, but the readings are inconclusive because of their erratic nature. Of the possible faults listed, select the one that most probably is causing the problem.

    • Options
    • A. A defective IC chip that is drawing excessive current from the power supply
    • B. A solar bridge between the inputs on the first IC chip on the board
    • C. An open input on the first IC chip on the board
    • D. A defective output IC chip that has an internal open to Vcc
    • Discuss
    • 3. The Boolean expression (A + B)(C + D) is an example of ________.

    • Options
    • A. LAB
    • B. LUT
    • C. SOP
    • D. POS
    • Discuss
    • 4. MOD-6 and MOD-12 counters and multiples are most commonly used as:

    • Options
    • A. frequency counters
    • B. multiplexed displays
    • C. digital clocks
    • D. power consumption meters
    • Discuss
    • 5. What is an EPM7128S?

    • Options
    • A. An Altera MAX7000S CPLD
    • B. An Altera UP2
    • C. A DeVry eSOC
    • D. A BSR PL DT-2
    • Discuss
    • 6. How can ECL have both a NOR and an OR output?

    • Options
    • A. ECL does not have this feature.
    • B. They are simply the inverse of each other.
    • Discuss
    • 7. Altera Corporation and Xilinx Corporation are the two leading PLD manufacturers.

    • Options
    • A. True
    • B. False
    • Discuss
    • 8. Assume a LOW logic level is placed on the SHIFT/LOAD input of a 74195 shift register. The output will change ________.

    • Options
    • A. immediately
    • B. if the CLOCK is also LOW
    • C. on the next clock leading edge
    • D. depending on the J and K inputs
    • Discuss
    • 9. The delay between a change on the digital input of a DAC and the appearance of the change on the output is called settling time.

    • Options
    • A. True
    • B. False
    • Discuss
    • 10. An invalid condition in the operation of an active-HIGH input S-R latch occurs when ________.

    • Options
    • A. HIGHs are applied simultaneously to both inputs S and R
    • B. LOWs are applied simultaneously to both inputs S and R
    • C. a LOW is applied to the S input while a HIGH is applied to the R input
    • D. a HIGH is applied to the S input while a LOW is applied to the R input
    • Discuss


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